From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ben Widawsky Subject: Re: [PATCH 3/3] drm/i915: userspace interface to the forcewake Date: Sun, 17 Apr 2011 09:55:12 -0700 Message-ID: <20110417165512.GA21592@lundgren.kumite> References: <1302804827-11597-1-git-send-email-ben@bwidawsk.net> <1302804827-11597-6-git-send-email-ben@bwidawsk.net> <1302810962.2522.5.camel@mattotaupa> <1bdc18$k8bua6@fmsmga002.fm.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from cloud01.chad-versace.us (184-106-247-128.static.cloud-ips.com [184.106.247.128]) by gabe.freedesktop.org (Postfix) with ESMTP id 0AE559E775 for ; Sun, 17 Apr 2011 09:55:15 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1bdc18$k8bua6@fmsmga002.fm.intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Chris Wilson Cc: intel-gfx@lists.freedesktop.org, Paul Menzel List-Id: intel-gfx@lists.freedesktop.org On Sat, Apr 16, 2011 at 08:05:42AM +0100, Chris Wilson wrote: > On Thu, 14 Apr 2011 21:56:02 +0200, Paul Menzel wrote: > But Ben... I seemed to have missed the real reason why we need the > spinlock. You have to remind me or else I will keep whining on like a > broken record. ;-) > -Chris > The reason rests on 1 major conclusion, we must make sure FORCEAWAKE (FORCEWAKE_ACK in the code) is set prior to reading any register in the range 0-0x3ffff. If I've misunderstood the way this works, and that is not correct, then you can stop reading now. The simplest case which shows why we need a spinlock is in reading IIR (as discussed previously, including my theory why we probably don't actually have an issue today) in the interrupt handler. We can't get struct_mutex there, so we're forced to either bump up struct_mutex to a spinlock, or introduce a new one. There were one or two cases which got uncovered with the warning, which I can't find from code inspection right now, where we write to these registers with just config.mutex. In those cases, we could just acquire struct_mutex after config.mutex, and that should fix those problems. Now assuming access is synchronized, here is how I believe it should work: /* * Sorry for using the register names from the doc, which differ from * our code, but I'm writing this while reading the docs, not our code. */ u32 reg = IIR; // As an example if (reg < 0x40000) { while(!I915_READ(GTFORCEAWAKE)) { I915_WRITE(FORCEWAKE, FWAKE2) I915_POSTING_READ(FORCEWAKE); gen6_gt_drain_write_fifo(); // ;) } } I would honestly prefer being wrong about this :-) Ben