From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ben Widawsky Subject: Re: [PATCH 2/3] drm/i915: close PM interrupt masking races in the rps work func Date: Sun, 4 Sep 2011 10:08:17 -0700 Message-ID: <20110904100817.16c6c4cc@bwidawsk.net> References: <20110904084953.16cd10a2@bwidawsk.net> <1315150502-12537-1-git-send-email-daniel.vetter@ffwll.ch> <1315150502-12537-3-git-send-email-daniel.vetter@ffwll.ch> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from cloud01.chad-versace.us (184-106-247-128.static.cloud-ips.com [184.106.247.128]) by gabe.freedesktop.org (Postfix) with ESMTP id 2C6A69E7A8 for ; Sun, 4 Sep 2011 10:08:11 -0700 (PDT) In-Reply-To: <1315150502-12537-3-git-send-email-daniel.vetter@ffwll.ch> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Daniel Vetter Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Sun, 4 Sep 2011 17:35:01 +0200 Daniel Vetter wrote: > This patch closes the following race: > > We get a PM interrupt A, mask it, set dev_priv->iir = PM_A and kick > of the work item. Scheduler isn't grumpy, so the work queue takes > rps_lock, grabs pm_iir = dev_priv->pm_iir and pm_imr = READ(PMIMR). > Note that pm_imr == pm_iir because we've just masked the interrupt > we've got. > > Now hw sends out PM interrupt B (not masked), we process it and mask > it. Later on the irq handler also clears PMIIR. > > Then the work item proceeds and at the end clears PMIMR. Because > (local) pm_imr == pm_iir we have > pm_imr & ~pm_iir == 0 > so all interrupts are enabled. > > Hardware is still interrupt-happy, and sends out a new PM interrupt B. > PMIMR doesn't mask B (it does not mask anything), PMIIR is cleared, so > we get it and hit the WARN in the interrupt handler (because > dev_priv->pm_iir == PM_B). > > That's why I've moved the > WRITE(PMIMR, 0) > up under the protection of the rps_lock. And write an uncoditional 0 > to PMIMR, because that's what we'll do anyway. > > This races looks much more likely because we can arbitrarily extend > the window by grabing dev->struct mutex right after the irq handler > has processed the first PM_B interrupt. > > Signed-off-by: Daniel Vetter > --- > drivers/gpu/drm/i915/i915_irq.c | 2 +- > 1 files changed, 1 insertions(+), 1 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_irq.c > b/drivers/gpu/drm/i915/i915_irq.c index 2fdd9f9..21ebcbd 100644 > --- a/drivers/gpu/drm/i915/i915_irq.c > +++ b/drivers/gpu/drm/i915/i915_irq.c > @@ -383,6 +383,7 @@ static void gen6_pm_rps_work(struct work_struct > *work) pm_iir = dev_priv->pm_iir; > dev_priv->pm_iir = 0; > pm_imr = I915_READ(GEN6_PMIMR); > + I915_WRITE(GEN6_PMIMR, 0); > spin_unlock_irq(&dev_priv->rps_lock); > > if (!pm_iir) > @@ -420,7 +421,6 @@ static void gen6_pm_rps_work(struct work_struct > *work) > * an *extremely* unlikely race with gen6_rps_enable() that > is prevented > * by holding struct_mutex for the duration of the write. > */ > - I915_WRITE(GEN6_PMIMR, pm_imr & ~pm_iir); > mutex_unlock(&dev_priv->dev->struct_mutex); > } > How about this: diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 55518e3..3bc1479 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -415,12 +415,7 @@ static void gen6_pm_rps_work(struct work_struct *work) gen6_set_rps(dev_priv->dev, new_delay); dev_priv->cur_delay = new_delay; - /* - * rps_lock not held here because clearing is non-destructive. There is - * an *extremely* unlikely race with gen6_rps_enable() that is prevented - * by holding struct_mutex for the duration of the write. - */ - I915_WRITE(GEN6_PMIMR, pm_imr & ~pm_iir); + I915_WRITE(GEN6_PMIMR, pm_imr & dev_priv->pm_iir); mutex_unlock(&dev_priv->dev->struct_mutex); } Ben