From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH 2/3] drm/i915: close PM interrupt masking races in the rps work func Date: Mon, 5 Sep 2011 08:38:07 +0200 Message-ID: <20110905063807.GA2921@phenom.ffwll.local> References: <20110904084953.16cd10a2@bwidawsk.net> <1315150502-12537-1-git-send-email-daniel.vetter@ffwll.ch> <1315150502-12537-3-git-send-email-daniel.vetter@ffwll.ch> <20110904100817.16c6c4cc@bwidawsk.net> <20110904192648.GB2799@phenom.ffwll.local> <20110904195657.GB17304@cloud01> <20110904201030.GE2799@phenom.ffwll.local> <20110904213856.GA18071@cloud01> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-ey0-f169.google.com (mail-ey0-f169.google.com [209.85.215.169]) by gabe.freedesktop.org (Postfix) with ESMTP id 2C2749E9BE for ; Sun, 4 Sep 2011 23:37:52 -0700 (PDT) Received: by eye22 with SMTP id 22so3878909eye.0 for ; Sun, 04 Sep 2011 23:37:52 -0700 (PDT) Content-Disposition: inline In-Reply-To: <20110904213856.GA18071@cloud01> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Ben Widawsky Cc: Daniel Vetter , intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Sun, Sep 04, 2011 at 09:38:56PM +0000, Ben Widawsky wrote: > Oops, you're totally right, I think I meant: > - I915_WRITE(GEN6_PMIMR, pm_imr & ~pm_iir); > + I915_WRITE(GEN6_PMIMR, dev_priv->pm_iir); Imo still racy without the irqsafe rps_lock around it. gcc is free to compile that into a separate load and store which the irq handler can get in between and change dev_priv->pm_iir and PMIMR. The race is now only one instruction wide, though ;-) -Daniel -- Daniel Vetter Mail: daniel@ffwll.ch Mobile: +41 (0)79 365 57 48