From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jesse Barnes Subject: Re: [Intel-gfx] [PATCH 9/9] drm/i915: Initialize PCH refclks at modeset init time Date: Mon, 3 Oct 2011 14:12:47 -0700 Message-ID: <20111003141247.76038b31@jbarnes-desktop> References: <1317103906-4649-1-git-send-email-keithp@keithp.com> <1317103906-4649-10-git-send-email-keithp@keithp.com> Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: Sender: linux-kernel-owner@vger.kernel.org To: Keith Packard Cc: Chris Wilson , Dave Airlie , intel-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Tue, 27 Sep 2011 11:11:57 -0700 Keith Packard wrote: > On Tue, 27 Sep 2011 17:56:39 +0100, Chris Wilson wrote: > > > Ah, now I see why we moved from using the active configuration earlier. ;-) > > My evil plan is revealed! > > > Doesn't this prevent us from ever using SSC though, as virtually every > > single PCH machine has HDMI encoders that haven't been masked out through > > the chicken fuses or VBT? > > That wasn't my intent -- the SSC source gets modulated whenever the VBT > table says it can, so when the panel uses the SSC source, it will get > SSC. Did I mess something up here? Or is it just some interaction with > the mode setting code that I didn't get right? Assuming we're selecting the proper reference clock in the PLL selection code anyway... Doing it all up front seems nicer; did you get confirmation that the "wavy VGA" bug was fixed with this series? Overall seems like a good improvement over our old PCH refclk code... -- Jesse Barnes, Intel Open Source Technology Center