From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jesse Barnes Subject: Re: [PATCH] drm/i915: always set FDI composite sync bit Date: Tue, 11 Oct 2011 10:38:09 -0700 Message-ID: <20111011103809.00c86fb2@jbarnes-desktop> References: <1318282132-8104-1-git-send-email-jbarnes@virtuousgeek.org> <4E944E50.1070903@redhat.com> <20111011091649.784c9545@jbarnes-desktop> <4E9471EE.9080201@redhat.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0264362082==" Return-path: Received: from oproxy9.bluehost.com (oproxy9.bluehost.com [69.89.24.6]) by gabe.freedesktop.org (Postfix) with SMTP id 66FDF9E75A for ; Tue, 11 Oct 2011 10:38:15 -0700 (PDT) In-Reply-To: <4E9471EE.9080201@redhat.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Adam Jackson Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org --===============0264362082== Content-Type: multipart/signed; micalg=PGP-SHA1; boundary="Sig_/wP+6K2WbUb=35Zce3UPa1n="; protocol="application/pgp-signature" --Sig_/wP+6K2WbUb=35Zce3UPa1n= Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: quoted-printable On Tue, 11 Oct 2011 12:42:22 -0400 Adam Jackson wrote: > On 10/11/11 12:16 PM, Jesse Barnes wrote: > > On Tue, 11 Oct 2011 10:10:24 -0400 Adam Jackson wrote: > >> It still seems entirely magical and probably wrong in some situations. > >> And I'm thrilled to see that PPT is functionally different from CPT > >> (seriously, stop doing that) instead of just moving bit definitions > >> around (seriously, stop doing that). But this change is massively > >> better than before. > > > > Without composite sync, FDI needs frame/line sync (the fsync/lsync > > mentioned in the docs), which means extra wires between the CPU and > > PCH. Some boards don't have these and so we need to use composite. > > For the same reason, if FDI B and C are sharing lanes, we need to use > > composite or we won't have enough lines to go around. > > > > I've asked the hardware guys whether using composite on a board that > > supports fsync/lsync is ok generally; if so just defaulting to that > > everywhere should be fine. >=20 > Makes sense. If true this seems worth doing for CPT too. The IBX docs=20 > don't make any mention of composite sync. Supposedly SNB doesn't support this on the CPU side, so I've only put it in the IVB FDI training code. ILK + IBX don't support it at all according to the hw folks. --=20 Jesse Barnes, Intel Open Source Technology Center --Sig_/wP+6K2WbUb=35Zce3UPa1n= Content-Type: application/pgp-signature; name=signature.asc Content-Disposition: attachment; filename=signature.asc -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.10 (GNU/Linux) iQIcBAEBAgAGBQJOlH8BAAoJEIEoDkX4Qk9hgPIP/3wyAiqWlLNdGpDvA5H0CUbW 2RPwlNhJ+B48NI2QwueaFQQFNRMKvOa/R6gLOcXcOL0CU/1iMcJv1Tz4+Iee6Kqx OJelOi4CEbd/3bnVZoo0roIkXJ00PPg5ZaMEz22O9pMuFOv1EJpBGv+XQzDl2C30 zzk89gjvRX5YfCW/4OcRicahUfwLn+smFyEszyTzw8S+T0oaGDnFfKhf54Y5rw2M VDfMdi93xZt1EqiGVVm9yIXKOkpb2wAU/nx1MmLtG+6WXs5ybxbG+N2Ydhl5ZrNx srUb19x0wRgDZVon97reundBVwmElBsBzuJpmJfja/JTEbD2VFvhzpGosWnEHk9B CpOmwWaOJviAn7qxUz+ev+PGgFJToPXzVLJuag9M0eest+edN8pFP6sCBxHbTdKd HXccJfT9RIVccQoyNXyxjkXC+jvMGfv4DrLxsCX4/C7CaP8PLgzwV75X2PW/QP9T WuuCLthAIIkAMjD+qrM4Vyv5wZQmsNbgmY1s2tLnAEIminGIv64lTosmzolhdryC M/ktPm1MbbZbWSatKHfhDH74Qz+iP8CrrgQNc9vRZt4p0Cor8sTKs0angOK7Gd7H OELfaXmbo3bdY+1h9DpsirVe4YRr16XWo61xpRYRP3HUY3s6+kBK6swI7sOVDs8H MZtjIpSY+kdnrj+PiJZe =FdI/ -----END PGP SIGNATURE----- --Sig_/wP+6K2WbUb=35Zce3UPa1n=-- --===============0264362082== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx --===============0264362082==--