From mboxrd@z Thu Jan  1 00:00:00 1970
From: Wu Fengguang <fengguang.wu@intel.com>
Subject: Re: [PATCH v5] drm/i915: pass ELD to HDMI/DP audio
	driver
Date: Thu, 10 Nov 2011 15:33:50 +0800
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Cc: Jeremy Bush <contractfrombelow@gmail.com>, "intel-gfx@lists.freedesktop.org" <intel-gfx@lists.freedesktop.org>, "Wang, Zhenyu Z" <zhenyu.z.wang@intel.com>, "Bossart,
	Pierre-louis" <pierre-louis.bossart@intel.com>
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Wow I reproduced the bug and got a very interesting dmesg:

gfx =>        [ 4561.287980] [drm:intel_write_eld], ELD on [CONNECTOR:12:HDMI-A-2], [ENCODER:11:TMDS-11]
gfx =>        [ 4561.291730] [drm:ironlake_write_eld], ELD on pipe B
gfx =>        [ 4561.293804] [drm:ironlake_write_eld], Audio directed to unknown port
gfx =>        [ 4561.295273] [drm:ironlake_write_eld],
      alsa => [ 4561.295486] HDMI hot plug event: Codec=3 Pin=6 Presence_Detect=1 ELD_Valid=0
      alsa => [ 4561.295564] HDMI status: Codec=3 Pin=6 Presence_Detect=1 ELD_Valid=0
gfx =>        [ 4561.300020] ELD size 13
      alsa => [ 4561.300697] HDMI hot plug event: Codec=3 Pin=6 Presence_Detect=1 ELD_Valid=1
      alsa => [ 4561.303322] HDMI status: Codec=3 Pin=6 Presence_Detect=1 ELD_Valid=1
      alsa => [ 4561.311120] ALSA hda_eld.c:259 HDMI: Unknown ELD version 0
      
Hey the two parts are interleaved!

But still it should work all fine, since the gfx driver does

        set ELD_Valid = 0
        write ELD
        set ELD_Valid = 1

So the audio driver would read the correct ELD unless the ELD content
and flag writes are somehow _reordered_ underneath. Or the ELD content
writes take some time to take effect?

Thanks,
Fengguang