From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jesse Barnes Subject: Re: [PATCH] drm/i915: Don't lock panel registers when downclocking Date: Mon, 13 Feb 2012 11:02:39 -0800 Message-ID: <20120213110239.03d94d67@jbarnes-desktop> References: <20120213163949.GG5301@phenom.ffwll.local> <1329156891-16759-1-git-send-email-seanpaul@chromium.org> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0842438709==" Return-path: Received: from oproxy8-pub.bluehost.com (oproxy8-pub.bluehost.com [69.89.22.20]) by gabe.freedesktop.org (Postfix) with SMTP id 44C099E730 for ; Mon, 13 Feb 2012 11:02:45 -0800 (PST) In-Reply-To: <1329156891-16759-1-git-send-email-seanpaul@chromium.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Sean Paul Cc: intel-gfx@lists.freedesktop.org, jglasgow@chromium.org List-Id: intel-gfx@lists.freedesktop.org --===============0842438709== Content-Type: multipart/signed; micalg=PGP-SHA1; boundary="Sig_/Jmd4u2jGkZiH6dpw0NW0CJi"; protocol="application/pgp-signature" --Sig_/Jmd4u2jGkZiH6dpw0NW0CJi Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: quoted-printable On Mon, 13 Feb 2012 13:14:51 -0500 Sean Paul wrote: > This patch replaces the locking from the downclock routines with an assert > to ensure the registers are indeed unlocked. Without this patch, pre-SNB > devices would lock the registers when downclocking which would cause a > WARNING on suspend/resume with downclocking enabled. >=20 > Note: To hit this bug, you need to have lvds downclocking enabled. >=20 > Signed-off-by: Sean Paul > --- > drivers/gpu/drm/i915/intel_display.c | 14 ++------------ > 1 files changed, 2 insertions(+), 12 deletions(-) >=20 > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/= intel_display.c > index ebe71ed..33ef4f3 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -6968,9 +6968,7 @@ static void intel_increase_pllclock(struct drm_crtc= *crtc) > if (!HAS_PIPE_CXSR(dev) && (dpll & DISPLAY_RATE_SELECT_FPA1)) { > DRM_DEBUG_DRIVER("upclocking LVDS\n"); > =20 > - /* Unlock panel regs */ > - I915_WRITE(PP_CONTROL, > - I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS); > + assert_panel_unlocked(dev_priv, pipe); > =20 > dpll &=3D ~DISPLAY_RATE_SELECT_FPA1; > I915_WRITE(dpll_reg, dpll); > @@ -6979,9 +6977,6 @@ static void intel_increase_pllclock(struct drm_crtc= *crtc) > dpll =3D I915_READ(dpll_reg); > if (dpll & DISPLAY_RATE_SELECT_FPA1) > DRM_DEBUG_DRIVER("failed to upclock LVDS!\n"); > - > - /* ...and lock them again */ > - I915_WRITE(PP_CONTROL, I915_READ(PP_CONTROL) & 0x3); > } > =20 > /* Schedule downclock */ > @@ -7011,9 +7006,7 @@ static void intel_decrease_pllclock(struct drm_crtc= *crtc) > if (!HAS_PIPE_CXSR(dev) && intel_crtc->lowfreq_avail) { > DRM_DEBUG_DRIVER("downclocking LVDS\n"); > =20 > - /* Unlock panel regs */ > - I915_WRITE(PP_CONTROL, I915_READ(PP_CONTROL) | > - PANEL_UNLOCK_REGS); > + assert_panel_unlocked(dev_priv, pipe); > =20 > dpll |=3D DISPLAY_RATE_SELECT_FPA1; > I915_WRITE(dpll_reg, dpll); > @@ -7021,9 +7014,6 @@ static void intel_decrease_pllclock(struct drm_crtc= *crtc) > dpll =3D I915_READ(dpll_reg); > if (!(dpll & DISPLAY_RATE_SELECT_FPA1)) > DRM_DEBUG_DRIVER("failed to downclock LVDS!\n"); > - > - /* ...and lock them again */ > - I915_WRITE(PP_CONTROL, I915_READ(PP_CONTROL) & 0x3); > } > =20 > } Yeah, looks good. Acked-by: Jesse Barnes --=20 Jesse Barnes, Intel Open Source Technology Center --Sig_/Jmd4u2jGkZiH6dpw0NW0CJi Content-Type: application/pgp-signature; name=signature.asc Content-Disposition: attachment; filename=signature.asc -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAEBAgAGBQJPOV5PAAoJEIEoDkX4Qk9h/qMQAIGVSZF5Bq9lSWaixrqSV6hh OSV/srbMkym8r/MdDohyQJOCndoyFssK5F6s5i6hTq41Wmx4pvnkuHPP3cXW4Saw mTmQKyYBsxpBO/LZ37+5BfshRQ1llGHJ2lu11Wi471r/cO42z6pm8VvbQXBQxcUM o0SsYJsWLf/C6lhJFfwJXILd9OXSHI7e8FNVC+IRbHhlcihZYG6694zQfh/lB/5B OgjWkgntlk4APkO/7O5QK2nruyF7y8308l3686uiEKTU4ttqxbRzpPRATEfMjWwh S3Tsy0AsJ0ZoyaEBHwVTXa6n2wJ8BlsrQbpmwRt2RW8zkTedKNvnlD9qyoIe32f9 tfFTn3XwejXpb3xdENVsmiKAxHBcPdA5WMrF4qRZ0rbXtvkw0BwrVb+JrKr8iCGn yyaNwjJug+TPihALrNpHdzID2YEI41xGvVw1sYHQjGtNE/VGbk2VyEcjve2LRTOP 1T7WEwB7+Jke6rBR3K4d84fAiU62N8xnya98MsupCI3VRxNKE3dN+dLUO9gnG10i kgZVFMV/UTu36uaahqUmSb5SlZsZ3n1pO1cO2/wwIKXioLnNIoQEfjnHuHou+2WA s/1Ud5aENU04BsrqFVtm+qlqorv+qKIt5euGiXj7BTP31pgaDz0tcLWkmTayP1Iy /IglC7CVH9zhk1OMcMSU =P2DM -----END PGP SIGNATURE----- --Sig_/Jmd4u2jGkZiH6dpw0NW0CJi-- --===============0842438709== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx --===============0842438709==--