[PULL] drm-intel-next

Daniel Vetter
2016-04-29T07:53:51Z

Hi Dave,

drm-intel-next-2016-04-25:
- more userptr cornercase fixes from Chris
- clean up and tune forcewake handling (Tvrtko)
- more underrun fixes from Ville, mostly for ilk to appeas CI
- fix unclaimed register warnings on vlv/chv and enable the debug code to catch
them by default (Ville)
- skl gpu hang fixes for gt3/4 (Mika Kuoppala)
- edram improvements for gen9+ (Mika again)
- clean up gpu reset corner cases (Chris)
- fix ctx/ring machine deaths on snb/ilk (Chris)
- MOCS programming for all engines (Peter Antoine)
- robustify/clean up vlv/chv irq handler (Ville)
- split gen8+ irq handlers into ack/handle phase (Ville)
- tons of bxt rpm fixes (mostly around firmware interactions), from Imre
- hook up panel fitting for dsi panels (Ville)
- more runtime PM fixes all over from Imre
- shrinker polish (Chris)
- more guc fixes from Alex Dai and Dave Gordon
- tons of bugfixes and small polish all over (but with a big focus on bxt)

Final feature pull request for 4.7, after this Jani will take over as
usual with handling the inevitable fallout&fixes ;-)

Cheers, Daniel

The following changes since commit ba3150ac3876acd082307f142597d3482107facc:

drm/i915: Update DRIVER_DATE to 20160411 (2016-04-11 20:20:18 +0200)

are available in the git repository at:

git://anongit.freedesktop.org/drm-intel tags/drm-intel-next-2016-04-25

for you to fetch changes up to 5b4fd5b1111b1230cd037df3b314e7b36d45d483:

drm/i915: Update DRIVER_DATE to 20160425 (2016-04-25 09:35:38 +0200)

----------------------------------------------------------------
- more userptr cornercase fixes from Chris
- clean up and tune forcewake handling (Tvrtko)
- more underrun fixes from Ville, mostly for ilk to appeas CI
- fix unclaimed register warnings on vlv/chv and enable the debug code to catch
them by default (Ville)
- skl gpu hang fixes for gt3/4 (Mika Kuoppala)
- edram improvements for gen9+ (Mika again)
- clean up gpu reset corner cases (Chris)
- fix ctx/ring machine deaths on snb/ilk (Chris)
- MOCS programming for all engines (Peter Antoine)
- robustify/clean up vlv/chv irq handler (Ville)
- split gen8+ irq handlers into ack/handle phase (Ville)
- tons of bxt rpm fixes (mostly around firmware interactions), from Imre
- hook up panel fitting for dsi panels (Ville)
- more runtime PM fixes all over from Imre
- shrinker polish (Chris)
- more guc fixes from Alex Dai and Dave Gordon
- tons of bugfixes and small polish all over (but with a big focus on bxt)

----------------------------------------------------------------
Akash Goel (3):
drm/i915: Macros to convert PM time interval values to microseconds
drm/i915: Correct the i915_frequency_info debugfs output
drm/i915/bxt: Explicitly clear the Turbo control register

Alex Dai (1):
drm/i915/guc: drop cached copy of 'wq_head'

Chris Wilson (23):
drm/i915/userptr: Flush cancellations before mmu-notifier invalidate returns
drm/i915/userptr: Hold mmref whilst calling get-user-pages
drm/i915/userptr: Store i915 backpointer for i915_mm_struct
drm/i915: Force clean compilation with -Werror
drm/i915: Disentangle i915_drv.h includes
drm/i915: Add GEM debugging Kconfig option
drm/i915: Hide the atomic_read(reset_counter) behind a helper
drm/i915: Simplify checking of GPU reset_counter in display pageflips
drm/i915: Tighten reset_counter for reset status
drm/i915: Store the reset counter when constructing a request
drm/i915: Simplify reset_counter handling during atomic modesetting
drm/i915: Prevent leaking of -EIO from i915_wait_request()
drm/i915: Suppress error message when GPU resets are disabled
drm/i915: Prevent machine death on Ivybridge context switching
drm/i915: Force ringbuffers to not be at offset 0
drm/i915: Move the mb() following release-mmap into release-mmap
drm/i915: Split out !RCS legacy context switching
drm/i915: Reorganise legacy context switch to cope with late failure
drm/i915: Late request cancellations are harmful
drm/i915: Avoid stalling on pending flips for legacy cursor updates
drm/i915/shrinker: Only report objects with extra pinned pages as pinned
drm/i915/shrinker: Report "unevictable" pages
drm/i915/shrinker: Only shmemfs objects are backed by swap

Daniel Vetter (1):
drm/i915: Update DRIVER_DATE to 20160425

Dave Gordon (3):
drm/i915/guc: keep GuC doorbell & process descriptor mapped in kernel
drm/i915/guc: local optimisations and updating comments
drm/i915: check for ERR_PTR from i915_gem_object_pin_map()

Dongwon Kim (1):
drm/i915/bxt: PORT_PLL_REF_SEL bit should be set for all BXT variations

Gustavo Padovan (1):
drm/i915: use drm_crtc_send_vblank_event()

Imre Deak (29):
drm/i915/bxt: Reject DMC firmware versions with known bugs
drm/i915/bxt: Fix GRC code register field definitions
drm/i915/bxt: Add a note about BXT_PORT_CL1CM_DW30 being read-only
drm/i915/gen9: Reset secondary power well requests left on by DMC/KVMR
drm/i915/gen9: Make power well disabling synchronous
drm/i915/gen9: Fix DMC/DC state asserts
drm/i915/bxt: Suspend power domains during suspend-to-idle
drm/i915/skl: Unexport skl_pw1_misc_io_init
drm/i915/bxt: Pass drm_i915_private to DDI PHY, CDCLK helpers
drm/i915/bxt: Power down DDI PHYs separately during the per PHY uninit
drm/i915/bxt: Don't toggle power well 1 on-demand
drm/i915/bxt: Sanitize the DBUF HW state together with CDCLK
drm/i915/bxt: Don't reprogram an already enabled DDI PHY
drm/i915/bxt: Add HW state verification for DDI PHY and CDCLK
Revert "drm/i915/bxt: Disable power well support"
drm/i915/bxt: Enable runtime PM
drm/i915/kbl: Reset secondary power well requests left on by DMC/KVMR
drm/i915: Fix error path in i915_drm_resume_early
drm/i915: Fix system resume if PCI device remained enabled
drm/i915/ddi: Fix eDP VDD handling during booting and suspend/resume
drm/i915/gen9: Fix runtime PM refcounting in case DMC firmware isn't loaded
drm/i915/kbl: Don't WARN for expected secondary MISC IO power well request
drm/i915: Inline intel_suspend_complete
drm/i915/bxt: Don't uninit/init display core twice during system suspend/resume
drm/i915/bxt: Sanitize DC state tracking during system resume
drm/i915/bxt: Enable DC5 during runtime resume
drm/i915/bxt: Use PHY0 GRC value for HW state verification
drm/i915/bxt: Wait for PHY1 GRC done if PHY0 was already enabled
drm/i915/bxt: Force reprogramming a PHY with invalid HW state

Jani Nikula (3):
drm/i915: add INTEL_GEN() helper shorthand for INTEL_INFO()->gen
drm/i915/opregion: remove unnecessary ifdefs on CONFIG_ACPI
drm/i915/dsi: fix CHV dsi encoder hardware state readout on port C

Joonas Lahtinen (1):
drm/i915: Clean up PCI config register handling

Matthew Auld (2):
drm/i915: call kunmap_px on pt_vaddr
drm/i915: use dev_priv directly in gen8_ppgtt_notify_vgt

Michał Winiarski (1):
drm/i915: Adjust size of PIPE_CONTROL used for gen8 render seqno write

Mika Kahola (1):
drm/i915: Fix eDP low vswing for Broadwell

Mika Kuoppala (5):
drm/i915/skl: Fix rc6 based gpu/system hang
drm/i915/skl: Fix spurious gpu hang with gt3/gt4 revs
drm/i915: Don't program eLLC IDI hash mask for gen9+
drm/i915: Store and use edram capabilities
drm/i915: Calculate edram size

Peter Antoine (1):
drm/i915/mocs: Program MOCS for all engines on init

Shashank Sharma (1):
drm/i915: Fake HDMI live status

Shubhangi Shrivastava (1):
drm/i915: Fixing eDP detection on certain platforms

Tim Gore (1):
drm/i915/gen9: implement WaEnableSamplerGPGPUPreemptionSupport

Tvrtko Ursulin (12):
drm/i915: Use consistent forcewake auto-release timeout across kernel configs
drm/i915: Simplify for_each_fw_domain iterators
drm/i915: Do not serialize forcewake acquire across domains
drm/i915: Extract knowledge of register forcewake domains
drm/i915: Remove forcewake request registers from the shadowed table
drm/i915: Only grab correct forcewake for the engine with execlists
drm/i915: Split execlists hardware status page initialisation from setup
drm/i915: Use new i915_gem_object_pin_map for LRC
drm/i915: Show pin mapped status in describe_obj
drm/i915: Show pin mapped counts and sizes in debugfs
drm/i915/gen8+: Do not enable DPF interrupt since the handler does not exist
drm/i915: Remove a couple pointless WARN_ONs

Ville Syrjälä (50):
drm/i915: Protect force_bit with gmbus_mutex
drm/i915: Restore GMBUS operation after a failed bit-banging fallback
drm/i915: Make GMBUS timeout message DRM_DEBUG_KMS
drm/i915: Reject panel_type > 0xf from VBT
drm/i915: Replace the static panel_type variable with dev_priv->vbt.panel_type
drm/i915: Get panel_type from OpRegion panel details
drm/i915: Try to shut up more ILK underruns
drm/i915: Make sure LP1+ watermarks levels are preserved when going from 1 to 2 pipes
drm/i915: Replace ILK eDP underrun suppression with something better
drm/i915: Remove "VLV magic" from irq setup
drm/i915: Fix up vlv/chv display irq setup
drm/i915: Skip display irq setup if display irqs aren't flagged as enabled
drm/i915: Move vlv/chv display irq code to a more logical place
drm/i915: Clear display interrupt before enabling when turning on the power well
drm/i915: Use GEN5_IRQ_INIT() in vlv_display_irq_postinstall()
drm/i915: Warn if irq_mask isn't ~0 during vlv/cvh display irq postinstall
drm/i915: Move vlv_init_display_clock_gating() to the display power well
drm/i915: Move DPINVGTT setup to vlv_display_irq_reset()
Revert "drm/i915: Limit the auto arming of mmio debugs on vlv/chv"
drm/i915: Change lfsr_converts[] to u16
drm/i915: Power down the DSI PLL before reconfiguring it
drm/i915: Fix CHV DSI PLL refclk during state readout
drm/i915: Dump pfit PGM_RATIOS as hex
drm/i915: Don't read out port_clock on CHV when DPLL is disabled
drm/i915: Ignore GTFIFODBG FIFO free entry fields on CHV
drm/i915: Use GEN8_MASTER_IRQ_CONTROL consistently
drm/i915: Set up VLV_MASTER_IER consistently
drm/i915: Clear VLV_IIR after PIPESTAT
drm/i915: Clear VLV_MASTER_IER around irq processing
drm/i915: Clear VLV_IER around irq processing
drm/i915: Eliminate loop from VLV irq handler
drm/i915: Move variables to narrower scope in VLV/CHV irq handlers
drm/i915: Split PORT_HOTPLUG_STAT ack out from i9xx_hpd_irq_handler()
drm/i915: Split VLV/CVH PIPESTAT handling into ack+handler
drm/i915: Move gt/pm irq handling out from irq disabled section on VLV
drm/i915: Eliminate passing dev+dev_priv to {snb,ilk}_gt_irq_handler()
drm/i915: Split gen8_gt_irq_handler into ack+handle
drm/i915: Use fw_domains_put_with_fifo() on HSW
drm/i915: Setup DPLL/DPLLMD for DSI too on VLV/CHV
drm/i915: Compute DSI PLL parameters during .compute_config()
drm/i915: Eliminate {vlv,bxt}_configure_dsi_pll()
drm/i915: Hook up pfit for DSI
drm/i915: Reject 'Center' scaling mode for eDP/DSI on GMCH platforms
drm/i915: Replace nondescript 'WARN_ON(!lret)' with a sensible error message
drm/i915: Fix oops in vlv_force_pll_on()
drm/i915: Set .domains=POWER_DOMAIN_MASK for the always-on well
drm/i915: Define VLV/CHV display power well domains properly
drm/i915: Define HSW/BDW display power domains the right way up
drm/i915: Wait for power cycle delay after turning off DSI panel power
drm/i915: Make RPS EI/thresholds multiple of 25 on SNB-BDW

jim.bride@linux.intel.com (1):
drm/i915/dp/mst: Fix MST logic in intel_dp_long_pulse()

drivers/gpu/drm/i915/Kconfig.debug | 29 ++
drivers/gpu/drm/i915/Makefile | 2 +
drivers/gpu/drm/i915/i915_debugfs.c | 104 ++++--
drivers/gpu/drm/i915/i915_dma.c | 32 +-
drivers/gpu/drm/i915/i915_drv.c | 193 ++++++-----
drivers/gpu/drm/i915/i915_drv.h | 126 ++++---
drivers/gpu/drm/i915/i915_gem.c | 197 +++++------
drivers/gpu/drm/i915/i915_gem.h | 34 ++
drivers/gpu/drm/i915/i915_gem_context.c | 228 +++++++------
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 15 +-
drivers/gpu/drm/i915/i915_gem_gtt.c | 10 +-
drivers/gpu/drm/i915/i915_gem_shrinker.c | 33 +-
drivers/gpu/drm/i915/i915_gem_stolen.c | 14 +-
drivers/gpu/drm/i915/i915_gem_userptr.c | 90 +++--
drivers/gpu/drm/i915/i915_guc_submission.c | 120 +++----
drivers/gpu/drm/i915/i915_irq.c | 523 +++++++++++++++--------------
drivers/gpu/drm/i915/i915_reg.h | 74 ++--
drivers/gpu/drm/i915/intel_bios.c | 32 +-
drivers/gpu/drm/i915/intel_csr.c | 64 +++-
drivers/gpu/drm/i915/intel_ddi.c | 234 +++++++++++--
drivers/gpu/drm/i915/intel_display.c | 309 +++++++++--------
drivers/gpu/drm/i915/intel_dp.c | 86 ++---
drivers/gpu/drm/i915/intel_dpll_mgr.c | 17 +-
drivers/gpu/drm/i915/intel_drv.h | 25 +-
drivers/gpu/drm/i915/intel_dsi.c | 135 ++++++--
drivers/gpu/drm/i915/intel_dsi.h | 14 +-
drivers/gpu/drm/i915/intel_dsi_pll.c | 156 ++++-----
drivers/gpu/drm/i915/intel_guc.h | 29 +-
drivers/gpu/drm/i915/intel_hdmi.c | 12 +-
drivers/gpu/drm/i915/intel_i2c.c | 19 +-
drivers/gpu/drm/i915/intel_lrc.c | 176 +++++-----
drivers/gpu/drm/i915/intel_lrc.h | 10 +-
drivers/gpu/drm/i915/intel_mocs.c | 155 ++++++---
drivers/gpu/drm/i915/intel_mocs.h | 2 +
drivers/gpu/drm/i915/intel_opregion.c | 58 ++--
drivers/gpu/drm/i915/intel_overlay.c | 8 +-
drivers/gpu/drm/i915/intel_panel.c | 4 +-
drivers/gpu/drm/i915/intel_pm.c | 51 +--
drivers/gpu/drm/i915/intel_ringbuffer.c | 51 ++-
drivers/gpu/drm/i915/intel_ringbuffer.h | 1 +
drivers/gpu/drm/i915/intel_runtime_pm.c | 370 +++++++++++++-------
drivers/gpu/drm/i915/intel_uncore.c | 500 ++++++++++++++++++---------
42 files changed, 2689 insertions(+), 1653 deletions(-)
create mode 100644 drivers/gpu/drm/i915/i915_gem.h

--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org