From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jesse Barnes Subject: pipe notify for ivb Date: Tue, 20 Mar 2012 14:53:19 -0700 Message-ID: <20120320145319.4247de70@jbarnes-desktop> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from oproxy9.bluehost.com (oproxy9.bluehost.com [69.89.24.6]) by gabe.freedesktop.org (Postfix) with SMTP id D6170A0AF4 for ; Tue, 20 Mar 2012 14:53:23 -0700 (PDT) Received: from c-67-161-37-189.hsd1.ca.comcast.net ([67.161.37.189] helo=jbarnes-desktop) by box514.bluehost.com with esmtpsa (TLSv1:AES128-SHA:128) (Exim 4.76) (envelope-from ) id 1SA6za-0004md-MM for intel-gfx@lists.freedesktop.org; Tue, 20 Mar 2012 15:53:23 -0600 List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org Hack for Ben. -- Jesse Barnes, Intel Open Source Technology Center diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 60e4b9e..ce045a8 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -62,7 +62,7 @@ module_param_named(semaphores, i915_semaphores, int, 0600); MODULE_PARM_DESC(semaphores, "Use semaphores for inter-ring sync (default: false)"); -unsigned int i915_enable_rc6 __read_mostly = 1; +unsigned int i915_enable_rc6 __read_mostly = 0; module_param_named(i915_enable_rc6, i915_enable_rc6, int, 0600); MODULE_PARM_DESC(i915_enable_rc6, "Enable power-saving render C-state 6 (default: true)"); diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 02f96fd..4ab2e90 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -568,7 +568,7 @@ static irqreturn_t ironlake_irq_handler(DRM_IRQ_ARGS) atomic_inc(&dev_priv->irq_received); if (IS_GEN6(dev)) - bsd_usr_interrupt = GT_GEN6_BSD_USER_INTERRUPT; + bsd_usr_interrupt = GT_GEN6_BSD_USER_INTERRUPT | GT_PIPE_NOTIFY; /* disable master interrupt before clearing iir */ de_ier = I915_READ(DEIER); @@ -602,7 +602,7 @@ static irqreturn_t ironlake_irq_handler(DRM_IRQ_ARGS) notify_ring(dev, &dev_priv->ring[RCS]); if (gt_iir & bsd_usr_interrupt) notify_ring(dev, &dev_priv->ring[VCS]); - if (gt_iir & GT_BLT_USER_INTERRUPT) + if (gt_iir & (GT_BLT_USER_INTERRUPT | GT_PIPE_NOTIFY)) notify_ring(dev, &dev_priv->ring[BCS]); if (de_iir & DE_GSE) @@ -1810,7 +1810,8 @@ static int ironlake_irq_postinstall(struct drm_device *dev) render_irqs = GT_USER_INTERRUPT | GT_GEN6_BSD_USER_INTERRUPT | - GT_BLT_USER_INTERRUPT; + GT_BLT_USER_INTERRUPT | + GT_PIPE_NOTIFY; else render_irqs = GT_USER_INTERRUPT | diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index 47b9b27..0a67334 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c @@ -292,8 +292,7 @@ static int init_render_ring(struct intel_ring_buffer *ring) I915_WRITE(MI_MODE, mode); } - if (INTEL_INFO(dev)->gen >= 6) { - } else if (IS_GEN5(dev)) { + if (INTEL_INFO(dev)->gen >= 5) { ret = init_pipe_control(ring); if (ret) return ret; @@ -411,10 +410,13 @@ pc_render_add_request(struct intel_ring_buffer *ring, * incoherence by flushing the 6 PIPE_NOTIFY buffers out to * memory before requesting an interrupt. */ - ret = intel_ring_begin(ring, 32); + ret = intel_ring_begin(ring, 38); if (ret) return ret; + update_semaphore(ring, 0, seqno); + update_semaphore(ring, 1, seqno); + intel_ring_emit(ring, GFX_OP_PIPE_CONTROL | PIPE_CONTROL_QW_WRITE | PIPE_CONTROL_WC_FLUSH | PIPE_CONTROL_TC_FLUSH); intel_ring_emit(ring, pc->gtt_offset | PIPE_CONTROL_GLOBAL_GTT); @@ -1289,12 +1291,10 @@ int intel_init_render_ring_buffer(struct drm_device *dev) struct intel_ring_buffer *ring = &dev_priv->ring[RCS]; *ring = render_ring; - if (INTEL_INFO(dev)->gen >= 6) { - ring->add_request = gen6_add_request; + if (INTEL_INFO(dev)->gen >= 5) { + ring->add_request = pc_render_add_request; ring->irq_get = gen6_render_ring_get_irq; ring->irq_put = gen6_render_ring_put_irq; - } else if (IS_GEN5(dev)) { - ring->add_request = pc_render_add_request; ring->get_seqno = pc_render_get_seqno; }