From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jesse Barnes Subject: Re: [PATCH 19/25] drm/i915: display regs are at 0x180000 on ValleyView Date: Wed, 21 Mar 2012 14:36:47 -0700 Message-ID: <20120321143647.2ecaeab9@jbarnes-desktop> References: <1332359326-15051-1-git-send-email-jbarnes@virtuousgeek.org> <1332359326-15051-20-git-send-email-jbarnes@virtuousgeek.org> <20120321213343.GK9913@phenom.ffwll.local> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0886467521==" Return-path: Received: from oproxy8-pub.bluehost.com (oproxy8-pub.bluehost.com [69.89.22.20]) by gabe.freedesktop.org (Postfix) with SMTP id 1618F9E761 for ; Wed, 21 Mar 2012 14:36:53 -0700 (PDT) In-Reply-To: <20120321213343.GK9913@phenom.ffwll.local> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Daniel Vetter Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org --===============0886467521== Content-Type: multipart/signed; micalg=PGP-SHA1; boundary="Sig_/Ykr8TMYTaP/1HIyCp8=jayv"; protocol="application/pgp-signature" --Sig_/Ykr8TMYTaP/1HIyCp8=jayv Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: quoted-printable On Wed, 21 Mar 2012 22:33:43 +0100 Daniel Vetter wrote: > On Wed, Mar 21, 2012 at 12:48:40PM -0700, Jesse Barnes wrote: > > Although internally the MMIO offsets for display regs haven't changed, > > their visibility through the PCI BAR has been affected by the addition > > of the Gunit, which occupies the low part of the address space. > >=20 > > Display regs on VLV are offset into the BAR by 0x180000, so we need to > > add that for any display register offset. > >=20 > > This patch is a hack to do just that, but ultimately we need to split > > our display and render code more cleanly and add accessor functions for > > them. > >=20 > > Signed-off-by: Jesse Barnes >=20 > Gosh, is this horrible ;-) I think a dev_priv->display_mmio_base like > you've proposed + I915_DISPLAY_READ/WRITE like we already have for the > ring stuff is much better ... I nearly got violent with the hw guys when they told me... But yeah I think a display reg wrapper with an offset is probably the least offensive. --=20 Jesse Barnes, Intel Open Source Technology Center --Sig_/Ykr8TMYTaP/1HIyCp8=jayv Content-Type: application/pgp-signature; name=signature.asc Content-Disposition: attachment; filename=signature.asc -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAEBAgAGBQJPaknvAAoJEIEoDkX4Qk9hXFoQALpVl48ZliOSuGTj4qCg4Dsa y8vTuvsaSFBRv9VsIvNbC7cH7IsbgvUzgARbCbBxgSoQhunY8K878v5jVAJCXrF7 L7oiJ06Hesq1goEvrFQNKlADzSqkp9s3c7U0Sge/i/lxZlUYcaeRT/x2Idl+BuCh vC9imzf6y3Ge1X45TpRdNOnGxA/CTRjYhFEQutXqLkWgVAYilzDqInWyPds+Sa/x Qhurvmp+3GZ6Ir/URNWCD9R/n+gJLXmv+bTedgtpBTUDChGnHQF2+D4/YK6YKGUZ F+ZN8h2NWC/D4ViBrOMUpAyjkQ8pvlVBsA4uO0mAQUYia4M90a38qZLY8LreqTSP pw3zcXHzOS7ZXirJc/sKkcnxVj9fkjLuVPGqzw48HrFNLa0jWDm5o9WBok/vI66h Bxr4Spj+Pr8GzZ36DZru55FSaV1Os/wRiHrSCPzS/BozMwGKTpZH17iruFu1AdWN UbPfbnsFwY3ZMSMsMpY0/+97rUyckgqCj+XMe5UXA4/sI5Zv4MJORwfuBt8BowT3 n4nSO4zjQCsqPKizKNSw8P9oWS1mlSF19uv9ZqR3eHBPg/UCCFWSsDeFitBUD8g8 YDHJApKviqNvZlwIED6mL1GT0AFPgA2SawdglwV4f+H0W6l2aDWRPx9yUVJxCb9u qVMo8hfY7PGNUbtqMfhW =/xj2 -----END PGP SIGNATURE----- --Sig_/Ykr8TMYTaP/1HIyCp8=jayv-- --===============0886467521== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx --===============0886467521==--