From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jesse Barnes Subject: Re: [PATCH 03/25] drm/i915: re-order GT IIR bit definitions Date: Thu, 22 Mar 2012 11:40:23 -0700 Message-ID: <20120322114023.789b8fb9@jbarnes-desktop> References: <1332359326-15051-1-git-send-email-jbarnes@virtuousgeek.org> <1332359326-15051-4-git-send-email-jbarnes@virtuousgeek.org> <20120321181036.162beca3@bwidawsk.net> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0979866069==" Return-path: Received: from oproxy3-pub.bluehost.com (oproxy3-pub.bluehost.com [69.89.21.8]) by gabe.freedesktop.org (Postfix) with SMTP id 402679E7AD for ; Thu, 22 Mar 2012 11:40:34 -0700 (PDT) In-Reply-To: <20120321181036.162beca3@bwidawsk.net> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Ben Widawsky Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org --===============0979866069== Content-Type: multipart/signed; micalg=PGP-SHA1; boundary="Sig_/z5SZfsAvPYxqL4Ld2e=waCp"; protocol="application/pgp-signature" --Sig_/z5SZfsAvPYxqL4Ld2e=waCp Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: quoted-printable On Wed, 21 Mar 2012 18:10:36 -0700 Ben Widawsky wrote: > On Wed, 21 Mar 2012 12:48:24 -0700 > Jesse Barnes wrote: >=20 > > They were all over the place, order them by position and add a few. > >=20 > > Signed-off-by: Jesse Barnes > > --- > > drivers/gpu/drm/i915/i915_reg.h | 20 ++++++++++++++------ > > 1 files changed, 14 insertions(+), 6 deletions(-) > >=20 > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i91= 5_reg.h > > index 52a06be..af5cd25 100644 > > --- a/drivers/gpu/drm/i915/i915_reg.h > > +++ b/drivers/gpu/drm/i915/i915_reg.h > > @@ -3063,18 +3063,26 @@ > > #define DE_PIPEB_VBLANK_IVB (1<<5) > > #define DE_PIPEA_VBLANK_IVB (1<<0) > > =20 > > +#define MASTER_IER_VLV 0x4400c /* Gunit master IER */ > > +#define MASTER_INTERRUPT_ENABLE (1<<31) > > + >=20 > Seems VLV_MASTER_IER would follow the convention. >=20 > > #define DEISR 0x44000 > > #define DEIMR 0x44004 > > #define DEIIR 0x44008 > > #define DEIER 0x4400c > > =20 > > /* GT interrupt */ > > -#define GT_PIPE_NOTIFY (1 << 4) > > -#define GT_SYNC_STATUS (1 << 2) > > -#define GT_USER_INTERRUPT (1 << 0) > > -#define GT_BSD_USER_INTERRUPT (1 << 5) > > -#define GT_GEN6_BSD_USER_INTERRUPT (1 << 12) > > -#define GT_BLT_USER_INTERRUPT (1 << 22) > > +#define GT_BLT_FLUSHDW_NOTIFY_INTERRUPT (1 << 26) > > +#define GT_BLT_CS_ERROR_INTERRUPT (1 << 25) > > +#define GT_BLT_USER_INTERRUPT (1 << 22) > > +#define GT_BSD_CS_ERROR_INTERRUPT (1 << 15) > > +#define GT_GEN6_BSD_USER_INTERRUPT (1 << 12) > > +#define GT_BSD_USER_INTERRUPT (1 << 5) > > +#define GT_L3_PARITY_ERROR_INTERRUPT (1 << 5) /* IVB+ */ > > +#define GT_PIPE_NOTIFY (1 << 4) > > +#define GT_RENDER_CS_ERROR_INTERRUPT (1 << 3) > > +#define GT_SYNC_STATUS (1 << 2) > > +#define GT_USER_INTERRUPT (1 << 0) >=20 > What about GT_GEN7_L3_PARITY_ERROR_INTERRUPT? Yeah it's gen7+ you're right. > Similarly if GT_BLT_FLUSHDW_NOTIFY_INTERRUPT and > GT_BLT_CS_ERROR_INTERRUPT only apply after a certain generation maybe > add that info... I know this applies directly to your overall pitch to > restructure things, but for now at least try to keep it consistent, and > helpfully named (imho). Docs aren't very helpful here; the ILK ones say they're the same but I'm suspicious... I'll gen6 the new ones though; we don't use them yet anyway. --=20 Jesse Barnes, Intel Open Source Technology Center --Sig_/z5SZfsAvPYxqL4Ld2e=waCp Content-Type: application/pgp-signature; name=signature.asc Content-Disposition: attachment; filename=signature.asc -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAEBAgAGBQJPa3IXAAoJEIEoDkX4Qk9hb9wP/A2r9DbJjtaDAMqO6TGHiq5m UT/PI19PY5EqSGnPZIWv0Eo+c+bSfg12YhaJddBpXmx614y1AbuxUBnnD6Gj/WIt ITdW7OO3AZYQ0SxyoHMz9s/N2lYZLzyuCQs9AIy7gMMy4fSq3U5Mu5Sk8m1Zx9Mg S2nfpizUEM0yMMx0r6dpMVlH9bD4epizkfLr7TVTX/1hX6PgEQN6N0X9ZQpbKV2B 47gsS0zjE/h2X0OW8ASuc2JlT8HYHn5YNHmqy/i3vQsc1dH6f+Jb/dQM5KErLDXj ADwY9K5BUCrrlr/yBINaQkE5sqBCPuTgtr3xDd5F8SOK/NXpdFG/E1mDjhxpzOGQ TNfDJL3c+teURk3XV3SBUqw+fLj+Tp7U14KU5HLuTRogK0Rp6l0acFowFH/Cu2sC K9MK7gDjJXWmEn00m+D0f+syF6Hx4JWCGf3gtktkUohxREAtPA5yTjSxCaQwvN+S YTSUddxrzst2yDLDP4zSEazXa3USB/Y6rq0/pofacVi2xU1Lxp4IIjBHQj/hLJVs 3s31ls0GueMb5+sxnCp/iQBS4NhvSrY59utsvvfsW6sVLKsqfGHZEvjK3pNWYPvr z+ykuzVPxpcQZijpoBiP9HA24sApoiozWWoODf34KMa8rYTY2dbpXU4e5Zn0DpNI mElIgCyhZMkue21Ghedn =V9da -----END PGP SIGNATURE----- --Sig_/z5SZfsAvPYxqL4Ld2e=waCp-- --===============0979866069== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx --===============0979866069==--