From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH 2/2] drm/i915: add an explict mmio base for gpio/gmbus io Date: Sat, 24 Mar 2012 15:57:11 +0100 Message-ID: <20120324145711.GA7563@phenom.ffwll.local> References: <1332542616-2367-1-git-send-email-daniel.vetter@ffwll.ch> <1332542616-2367-2-git-send-email-daniel.vetter@ffwll.ch> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-wg0-f43.google.com (mail-wg0-f43.google.com [74.125.82.43]) by gabe.freedesktop.org (Postfix) with ESMTP id 8BE599E78A for ; Sat, 24 Mar 2012 07:56:31 -0700 (PDT) Received: by wgbdr12 with SMTP id dr12so2225048wgb.12 for ; Sat, 24 Mar 2012 07:56:30 -0700 (PDT) Content-Disposition: inline In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Chris Wilson Cc: Daniel Vetter , Intel Graphics Development List-Id: intel-gfx@lists.freedesktop.org On Fri, Mar 23, 2012 at 11:01:31PM +0000, Chris Wilson wrote: > On Fri, 23 Mar 2012 23:43:36 +0100, Daniel Vetter wrote: > > Again, Valleyview modes these around, so make the mmio base more > > explicit to consolidate the base address computations to one > > HAS_PCH_SPLIT check. > > > > Signed-Off-by: Daniel Vetter > > Consolidating the offset computation is nice. Everytime I look at this I > question whether we should be using GMBUS0 or a plain 0 for the actual > registers. I think GMBUS0 wins for being greppable. > Reviewed-by: Chris Wilson I've applied these two to next, thanks for reviewing them. -Daniel -- Daniel Vetter Mail: daniel@ffwll.ch Mobile: +41 (0)79 365 57 48