From mboxrd@z Thu Jan  1 00:00:00 1970
From: Daniel Vetter <daniel@ffwll.ch>
Subject: Re: [PATCH 19/37] drm/i915: add LCPLL control registers
Date: Mon, 26 Mar 2012 19:46:55 +0200
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To: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Cc: intel-gfx@lists.freedesktop.org, Eugeni Dodonov <eugeni.dodonov@intel.com>
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On Mon, Mar 26, 2012 at 02:42:30PM -0300, Rodrigo Vivi wrote:
>  LCPLL_PLL_ENABLE should be  (0<<31)\

I that case I think we should name it LCPLL_PLL_DISABLE (and use (1<<31)
obviously).
-Daniel

> =

> Otherwise
> =

> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
> =

> On Wed, Mar 21, 2012 at 10:09 PM, Eugeni Dodonov
> <eugeni.dodonov@intel.com> wrote:
> > Those are used to control the display core clock.
> >
> > Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
> > ---
> > =A0drivers/gpu/drm/i915/i915_reg.h | =A0 =A07 +++++++
> > =A01 file changed, 7 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i91=
5_reg.h
> > index 03fb10d..fa9e3a8 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -4014,4 +4014,11 @@
> > =A0#define GTCCLK_EN =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =
=A0 =A0 =A00xC6030
> > =A0#define =A0GTCCLK_EN_ENABLE =A0 =A0 =A0 =A0 =A0 =A0 =A0(1<<0)
> >
> > +/* LCPLL Control */
> > +#define LCPLL_CTL =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =
=A0 =A00x130040
> > +#define =A0LCPLL_PLL_ENABLE =A0 =A0 =A0 =A0 =A0 =A0 =A0(1<<31)
> > +#define =A0LCPLL_PLL_LOCK =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =
=A0(1<<30)
> > +#define =A0LCPLL_CD_CLOCK_DISABLE =A0 =A0 =A0 =A0(1<<25)
> > +#define =A0LCPLL_CD2X_CLOCK_DISABLE =A0 =A0 =A0(1<<23)
> > +
> > =A0#endif /* _I915_REG_H_ */
> > --
> > 1.7.9.2
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> =

> =

> =

> -- =

> Rodrigo Vivi
> Blog: http://blog.vivi.eng.br
> GPG: 0x905BE242 @ wwwkeys.pgp.net
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- =

Daniel Vetter
Mail: daniel@ffwll.ch
Mobile: +41 (0)79 365 57 48