From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH 11/37] drm/i915: add definition of DDI buffer translations regs Date: Tue, 27 Mar 2012 15:37:59 +0200 Message-ID: <20120327133759.GA16018@phenom.ffwll.local> References: <1332378612-3814-1-git-send-email-eugeni.dodonov@intel.com> <1332378612-3814-12-git-send-email-eugeni.dodonov@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-wg0-f43.google.com (mail-wg0-f43.google.com [74.125.82.43]) by gabe.freedesktop.org (Postfix) with ESMTP id 449889E746 for ; Tue, 27 Mar 2012 06:37:20 -0700 (PDT) Received: by wgbdr12 with SMTP id dr12so3852974wgb.12 for ; Tue, 27 Mar 2012 06:37:19 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1332378612-3814-12-git-send-email-eugeni.dodonov@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Eugeni Dodonov Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Wed, Mar 21, 2012 at 10:09:46PM -0300, Eugeni Dodonov wrote: > Those registers are used to train DDI buffer translations for each link > type. > > Signed-off-by: Eugeni Dodonov some quick private discussion releaved that the A-E in these defines are also per-port. So I think we also need to rebase these on top of a port enum with a DDI_BUF_TRANS(port) macros instead. -Daniel > --- > drivers/gpu/drm/i915/i915_reg.h | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index b732aa1..0af47b4 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -3940,4 +3940,11 @@ > #define DDI_PORT_WIDTH_X4 (3<<1) > #define DDI_INIT_DISPLAY_DETECTED (1<<0) > > +/* DDI Buffer Translations */ > +#define DDI_BUF_TRANS_A 0x64E00 > +#define DDI_BUF_TRANS_B 0x64E60 > +#define DDI_BUF_TRANS_C 0x64EC0 > +#define DDI_BUF_TRANS_D 0x64F20 > +#define DDI_BUF_TRANS_E 0x64F80 > + > #endif /* _I915_REG_H_ */ > -- > 1.7.9.2 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Mail: daniel@ffwll.ch Mobile: +41 (0)79 365 57 48