From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jesse Barnes Subject: Re: [PATCH 04/22] drm/i915: interrupt bit definitions for VLV Date: Wed, 28 Mar 2012 14:39:37 -0700 Message-ID: <20120328143937.1cf653a2@jbarnes-desktop> References: <1332967182-23298-1-git-send-email-jbarnes@virtuousgeek.org> <1332967182-23298-5-git-send-email-jbarnes@virtuousgeek.org> <20120328213353.GB2046@phenom.ffwll.local> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from oproxy5-pub.bluehost.com (oproxy5-pub.bluehost.com [67.222.38.55]) by gabe.freedesktop.org (Postfix) with SMTP id 618FA9EC59 for ; Wed, 28 Mar 2012 14:39:40 -0700 (PDT) In-Reply-To: <20120328213353.GB2046@phenom.ffwll.local> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Daniel Vetter Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Wed, 28 Mar 2012 23:33:54 +0200 Daniel Vetter wrote: > This patch looks more like a random set of registers than interrupt > definitions. Also it's missing the sob line. Please clarify a bit what > this is about. Should probably be mashed in with the IRQ patch; do you want to do that when you apply? -- Jesse Barnes, Intel Open Source Technology Center