From: Ben Widawsky <ben@bwidawsk.net>
To: "Reese, Armin C" <armin.c.reese@intel.com>
Cc: "intel-gfx@lists.freedesktop.org" <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH] Mask reserved bits in display/sprite address registers
Date: Fri, 6 Apr 2012 16:25:51 -0700 [thread overview]
Message-ID: <20120406162551.0d99a514@bwidawsk.net> (raw)
In-Reply-To: <07EEC142D30DAC40BA4DD9C0F9EE51090E263D@FMSMSX102.amr.corp.intel.com>
On Thu, 5 Apr 2012 20:48:20 +0000
"Reese, Armin C" <armin.c.reese@intel.com> wrote:
> The patch file for this change is attached. Had to send it from
> Outlook and wanted to avoid corrupting the patch. Hence, the
> attachment.
>
> Armin
I don't know about the pipe stuff, but anything with gtt_offset should
always be PAGE_OFFSET, and so most of the macro stuff is way overkill
there. The only change is when you compare DISPSURF to gtt_offset, where
it would be easier to just use PAGE_MASK.
Ben
next prev parent reply other threads:[~2012-04-06 23:27 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-04-05 20:48 [PATCH] Mask reserved bits in display/sprite address registers Reese, Armin C
2012-04-06 23:25 ` Ben Widawsky [this message]
2012-04-09 15:48 ` Reese, Armin C
2012-04-09 20:11 ` Daniel Vetter
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