From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jesse Barnes Subject: Re: [PATCH] drm/i915: IS_GEN6 && IS_GEN7 - is unpossible Date: Mon, 9 Apr 2012 09:55:56 -0700 Message-ID: <20120409095556.6516a36b@jbarnes-desktop> References: <1333830435-4424-1-git-send-email-ben@bwidawsk.net> <60a83a21-3cdd-4005-9f0c-ede909955bef@email.android.com> <20120407135811.2ff0d99d@bwidawsk.net> <20120409160211.GA4813@phenom.ffwll.local> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0642533170==" Return-path: Received: from oproxy7-pub.bluehost.com (oproxy7-pub.bluehost.com [67.222.55.9]) by gabe.freedesktop.org (Postfix) with SMTP id C15FC9E787 for ; Mon, 9 Apr 2012 09:56:02 -0700 (PDT) In-Reply-To: <20120409160211.GA4813@phenom.ffwll.local> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Daniel Vetter Cc: Ben Widawsky , Ben@freedesktop.org, intel-gfx@lists.freedesktop.org, Widawsky List-Id: intel-gfx@lists.freedesktop.org --===============0642533170== Content-Type: multipart/signed; micalg=PGP-SHA1; boundary="Sig_/RpFX4V92qEMPZZNyucmDh7r"; protocol="application/pgp-signature" --Sig_/RpFX4V92qEMPZZNyucmDh7r Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: quoted-printable On Mon, 9 Apr 2012 18:02:11 +0200 Daniel Vetter wrote: > On Sat, Apr 07, 2012 at 01:58:11PM -0700, Ben Widawsky wrote: > > On Sat, 07 Apr 2012 13:48:30 -0700 > > Jesse Barnes wrote: > >=20 > > > Ben Widawsky wrote: > > >=20 > > > >Imagine my surprise when tracking something down, I bisected to a VLV > > > >commit. > > > > > > > >CC: Jesse Barnes > > > >Signed-off-by: Ben Widawsky > > > >--- > > > > drivers/gpu/drm/i915/intel_display.c | 2 +- > > > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > > > > >diff --git a/drivers/gpu/drm/i915/intel_display.c > > > >b/drivers/gpu/drm/i915/intel_display.c > > > >index 3abebb5..2ce1763 100644 > > > >--- a/drivers/gpu/drm/i915/intel_display.c > > > >+++ b/drivers/gpu/drm/i915/intel_display.c > > > >@@ -9537,7 +9537,7 @@ void intel_modeset_init(struct drm_device *dev) > > > > intel_init_emon(dev); > > > > } > > > >=20 > > > >- if ((IS_GEN6(dev) && IS_GEN7(dev)) && !IS_VALLEYVIEW(dev)) { > > > >+ if ((IS_GEN6(dev) || IS_GEN7(dev)) && !IS_VALLEYVIEW(dev)) { > > > > gen6_enable_rps(dev_priv); > > > > gen6_update_ring_freq(dev_priv); > > > > } > > > >--=20 > > > >1.7.10 > > >=20 > > > Daniel caught that one too, maybe he hasn't pushed the fix?=20 > >=20 > > Seems it hasn't been pushed, and I missed the exchange about the issue. > > As long as it's known already...` >=20 > Oh dear, how totally do I suck. And with rc6 disabled by accident on > snb&ivb the QA testing cycle is rather pointless, too. >=20 > I'll rip out the broken patch, rebase -testing and -next and ask QA to > re-run any gpu tests. I think modesetting tests shouldn't be affected by > rc6. >=20 > Ben, thanks for catching this screw-up. It's my fault, sorry for posting it in the first place! Daniel, do you need an incremental one to add the VLV check to this location or do you just want to fix it in-place after reverting the breakage? Also is the resume path correct (maybe that's the one you caught?)? --=20 Jesse Barnes, Intel Open Source Technology Center --Sig_/RpFX4V92qEMPZZNyucmDh7r Content-Type: application/pgp-signature; name=signature.asc Content-Disposition: attachment; filename=signature.asc -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAEBAgAGBQJPgxSdAAoJEIEoDkX4Qk9hVggQAJ/Fub2T07H9ltBglwzYxi9i kFcacWmYMCT3ZB+rqt2GLVswZ8u7Mb/Dx61z+jeWHQmk7PK5QQe1zMh2GBWYYCl4 NLp0Pq5PgzaCK3Tr/K/l816qXpjTwX9ZK6D1bjDi1cPpTXyTwDaDHT4mn+qsfOl2 yV2QHrN+BuzddV6JWOB5/E9yy+maet5Wcnohvi1g6a1nE6VMtbSzLtu/ILecwRDK /6HbLiiRpxNfzOtGxpOqb4zXk3l2a43iPnXYODiI3guNe/5YP9ER5S9QeHKsDnTt mXmZeHPiqDtURajB/Rok/hapL2SBrGt03DuLJXyy3qZ90ATDeFQMsWmKktDhkKRN ormWUJNm2URsf5iY2A0+xTOAvObN3bHN2W7ITOieVX4ukq4aHQyfVFHWg/R1qKsg l5e8cXppvX0a0wLfoKlUromYdO/DWcLxykPCpSJ8l5+qTETB5+oLG79sfUaAnbJv ab7mycVBw8mbj1HEzxVbrNdC2JxWZl0eG9Y9t5p0Xo7IOrtXeWisNnq9Qq5wqiIg aLMFqQxpW5/SAqKIv2mMUHgyFteSW1VcMjJogZkWaXF1V5asqdcRQrCtC7q5VOhG e9Bwf8kUrFWdPDFvK+FIAKlEf1Lx1xwUht9LKUZcevLJZAJEiI/E1RN+YQurFVY+ BG1yFwd0JPO5Q4HPlIgS =Ldzl -----END PGP SIGNATURE----- --Sig_/RpFX4V92qEMPZZNyucmDh7r-- --===============0642533170== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx --===============0642533170==--