From mboxrd@z Thu Jan  1 00:00:00 1970
From: Jesse Barnes <jbarnes@virtuousgeek.org>
Subject: Re: [PATCH] drm/i915/sprite: Always enable the scaler
	on IronLake
Date: Mon, 16 Apr 2012 08:00:17 -0700
Message-ID: <20120416080017.30ceb7b2@jbarnes-desktop>
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To: Chris Wilson <chris@chris-wilson.co.uk>
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On Sat, 14 Apr 2012 22:14:26 +0100
Chris Wilson <chris@chris-wilson.co.uk> wrote:

> As I do not see the output update without the scaler enabled on my
> i3-330m, always enable it.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
> ---
>  drivers/gpu/drm/i915/intel_sprite.c |    5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
> index a831b7d..1baa903 100644
> --- a/drivers/gpu/drm/i915/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/intel_sprite.c
> @@ -236,7 +236,7 @@ ilk_update_plane(struct drm_plane *plane, struct drm_framebuffer *fb,
>  	struct drm_i915_private *dev_priv = dev->dev_private;
>  	struct intel_plane *intel_plane = to_intel_plane(plane);
>  	int pipe = intel_plane->pipe, pixel_size;
> -	u32 dvscntr, dvsscale = 0;
> +	u32 dvscntr, dvsscale;
>  
>  	dvscntr = I915_READ(DVSCNTR(pipe));
>  
> @@ -292,7 +292,8 @@ ilk_update_plane(struct drm_plane *plane, struct drm_framebuffer *fb,
>  
>  	intel_update_sprite_watermarks(dev, pipe, crtc_w, pixel_size);
>  
> -	if (crtc_w != src_w || crtc_h != src_h)
> +	dvsscale = 0;
> +	if (IS_GEN5(dev) || crtc_w != src_w || crtc_h != src_h)
>  		dvsscale = DVS_SCALE_ENABLE | (src_w << 16) | src_h;
>  
>  	I915_WRITE(DVSSTRIDE(pipe), fb->pitches[0]);

Funky... do you notice any difference in output (fuzziness or anything)
with the scaler enabled?  Wonder if it's safe to enable for 1:1 scaling
on SNB as well.

Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org>

-- 
Jesse Barnes, Intel Open Source Technology Center