From mboxrd@z Thu Jan  1 00:00:00 1970
From: Jesse Barnes <jbarnes@virtuousgeek.org>
Subject: Re: [PATCH] drm/i915: Mask reserved bits in
 display/sprite address registers
Date: Tue, 17 Apr 2012 08:50:52 -0700
Message-ID: <20120417085052.4937c512@jbarnes-desktop>
References: <07EEC142D30DAC40BA4DD9C0F9EE51090E40E8@FMSMSX102.amr.corp.intel.com>
	<07EEC142D30DAC40BA4DD9C0F9EE51090E5110@FMSMSX102.amr.corp.intel.com>
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: 7bit
Return-path: <intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org>
Received: from oproxy5-pub.bluehost.com (oproxy5-pub.bluehost.com
	[67.222.38.55])
	by gabe.freedesktop.org (Postfix) with SMTP id 92D0DA09CC
	for <intel-gfx@lists.freedesktop.org>;
	Tue, 17 Apr 2012 08:50:58 -0700 (PDT)
In-Reply-To: <07EEC142D30DAC40BA4DD9C0F9EE51090E5110@FMSMSX102.amr.corp.intel.com>
List-Unsubscribe: <http://lists.freedesktop.org/mailman/options/intel-gfx>,
	<mailto:intel-gfx-request@lists.freedesktop.org?subject=unsubscribe>
List-Archive: <http://lists.freedesktop.org/archives/intel-gfx>
List-Post: <mailto:intel-gfx@lists.freedesktop.org>
List-Help: <mailto:intel-gfx-request@lists.freedesktop.org?subject=help>
List-Subscribe: <http://lists.freedesktop.org/mailman/listinfo/intel-gfx>,
	<mailto:intel-gfx-request@lists.freedesktop.org?subject=subscribe>
Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org
Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org
To: "Reese, Armin C" <armin.c.reese@intel.com>
Cc: "intel-gfx@lists.freedesktop.org" <intel-gfx@lists.freedesktop.org>
List-Id: intel-gfx@lists.freedesktop.org

On Mon, 16 Apr 2012 21:02:41 +0000
"Reese, Armin C" <armin.c.reese@intel.com> wrote:

> Corrected my name in the patch (acreese -> Armin Reese) ...
> 
> The attached patch file was updated to reflect reviewer's comments.  The only change I did not make was using PAGE_MASK instead of DISP_BASEADDR_MASK.  PAGE_MASK is CPU architecture dependent and I didn't want to tie our GPU addressing arch to that of the CPU.

Looks good, thanks Armin.

Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>

-- 
Jesse Barnes, Intel Open Source Technology Center