From mboxrd@z Thu Jan  1 00:00:00 1970
From: Daniel Vetter <daniel@ffwll.ch>
Subject: Re: [PATCH] drm/i915: implement
 Disable4x2SubspanOptimization w/a for ivb, too
Date: Wed, 18 Apr 2012 11:21:34 +0200
Message-ID: <20120418092134.GJ5315@phenom.ffwll.local>
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Cc: Daniel Vetter <daniel.vetter@ffwll.ch>, Ben Widawsky <ben@bwidawsk.net>
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On Sun, Apr 15, 2012 at 12:54:00AM +0200, Daniel Vetter wrote:
> Copy&pasted from the vlv setup code. According to docs, we need that
> on ivb, too.
> 
> Cc: Ben Widawsky <ben@bwidawsk.net>
> Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

Ben, can you please take a look at this?

Thanks, Daniel

> ---
>  drivers/gpu/drm/i915/intel_display.c |    5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 33aaad3..7be1d1a 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -8938,6 +8938,11 @@ static void ivybridge_init_clock_gating(struct drm_device *dev)
>  			   DISPPLANE_TRICKLE_FEED_DISABLE);
>  		intel_flush_display_plane(dev_priv, pipe);
>  	}
> +
> +	/* WaDisable4x2SubspanOptimization */
> +	I915_WRITE(CACHE_MODE_1, I915_READ(CACHE_MODE_1) |
> +		   (PIXEL_SUBSPAN_COLLECT_OPT_DISABLE << 16) |
> +		   PIXEL_SUBSPAN_COLLECT_OPT_DISABLE);
>  }
>  
>  static void valleyview_init_clock_gating(struct drm_device *dev)
> -- 
> 1.7.10
> 

-- 
Daniel Vetter
Mail: daniel@ffwll.ch
Mobile: +41 (0)79 365 57 48