From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH] drm/i915: CR clock gating is recommend to be set on PineView Date: Wed, 25 Apr 2012 11:49:43 +0200 Message-ID: <20120425094943.GE5079@phenom.ffwll.local> References: <1335270997-18750-1-git-send-email-chris@chris-wilson.co.uk> <1335275503-1771-1-git-send-email-chris@chris-wilson.co.uk> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-ee0-f49.google.com (mail-ee0-f49.google.com [74.125.83.49]) by gabe.freedesktop.org (Postfix) with ESMTP id 6B59BA0C8F for ; Wed, 25 Apr 2012 02:48:44 -0700 (PDT) Received: by eekb45 with SMTP id b45so230128eek.36 for ; Wed, 25 Apr 2012 02:48:43 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1335275503-1771-1-git-send-email-chris@chris-wilson.co.uk> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Chris Wilson Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Tue, Apr 24, 2012 at 02:51:43PM +0100, Chris Wilson wrote: > The specs recommend that this bit be set on PineView. No reason is > given, but it sounds like a powersaving bit that we should expect the > BIOS to be setting... > > v2: Rebase on top of _MASKED_ENABLE_BIT > > Signed-off-by: Chris Wilson Queued for -next, thanks for the patch. -Daniel -- Daniel Vetter Mail: daniel@ffwll.ch Mobile: +41 (0)79 365 57 48