From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH] drm/i915: gen6_enable_rps() wants to be called after ring initialisation Date: Wed, 2 May 2012 22:42:00 +0200 Message-ID: <20120502204159.GA4101@phenom.ffwll.local> References: <1335548197-2281-1-git-send-email-chris@chris-wilson.co.uk> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-wg0-f43.google.com (mail-wg0-f43.google.com [74.125.82.43]) by gabe.freedesktop.org (Postfix) with ESMTP id 4FF589E82A for ; Wed, 2 May 2012 13:41:00 -0700 (PDT) Received: by wgbdr1 with SMTP id dr1so839156wgb.12 for ; Wed, 02 May 2012 13:40:59 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1335548197-2281-1-git-send-email-chris@chris-wilson.co.uk> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Chris Wilson Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Fri, Apr 27, 2012 at 06:36:37PM +0100, Chris Wilson wrote: > Currently we call gen6_enable_rps() (which writes into the per-ring > register mmio space) from intel_modeset_init_hw() which is called before > we initialise the rings. If we defer intel_modeset_init_hw() until > afterwards (in the intel_modeset_gem_init() phase) all is well. > > Signed-off-by: Chris Wilson One thing I've noticed that with this patch we still have conflicting ordering of gem_init_hw vs. modeset_init_hw. With this patch we have - gem before modeset init_hw for initial load and after gpu reset - but gem _after_ modeset init_hw after resume. Given that we already have another workaround that wants gem (and the rings) fully running, I guess gem before modeset init_hw is the right order. Care to amend the patch to fix the resume path? -Daniel > --- > drivers/gpu/drm/i915/intel_display.c | 6 ++---- > 1 file changed, 2 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index be59e8f..27eda9a 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -6792,6 +6792,7 @@ void intel_modeset_init_hw(struct drm_device *dev) > > if (IS_IRONLAKE_M(dev)) { > ironlake_enable_drps(dev); > + ironlake_enable_rc6(dev); > intel_init_emon(dev); > } > > @@ -6849,8 +6850,6 @@ void intel_modeset_init(struct drm_device *dev) > i915_disable_vga(dev); > intel_setup_outputs(dev); > > - intel_modeset_init_hw(dev); > - > INIT_WORK(&dev_priv->idle_work, intel_idle_update); > setup_timer(&dev_priv->idle_timer, intel_gpu_idle_timer, > (unsigned long)dev); > @@ -6861,8 +6860,7 @@ void intel_modeset_init(struct drm_device *dev) > > void intel_modeset_gem_init(struct drm_device *dev) > { > - if (IS_IRONLAKE_M(dev)) > - ironlake_enable_rc6(dev); > + intel_modeset_init_hw(dev); > > intel_setup_overlay(dev); > } > -- > 1.7.10 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Mail: daniel@ffwll.ch Mobile: +41 (0)79 365 57 48