From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH 03/14] drm/i915: implement ironlake_wait_for_vblank Date: Tue, 8 May 2012 13:55:19 +0200 Message-ID: <20120508115519.GD4802@phenom.ffwll.local> References: <1336010154-2946-1-git-send-email-przanoni@gmail.com> <1336162707-3504-1-git-send-email-przanoni@gmail.com> <1336162707-3504-2-git-send-email-przanoni@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-ee0-f49.google.com (mail-ee0-f49.google.com [74.125.83.49]) by gabe.freedesktop.org (Postfix) with ESMTP id DBEF29E732 for ; Tue, 8 May 2012 04:54:11 -0700 (PDT) Received: by eekd17 with SMTP id d17so624760eek.36 for ; Tue, 08 May 2012 04:54:10 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1336162707-3504-2-git-send-email-przanoni@gmail.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Paulo Zanoni Cc: intel-gfx@lists.freedesktop.org, Paulo Zanoni List-Id: intel-gfx@lists.freedesktop.org On Fri, May 04, 2012 at 05:18:15PM -0300, Paulo Zanoni wrote: > From: Paulo Zanoni > > intel_wait_for_vblank uses PIPESTAT, which does not exist on Ironlake > and newer, so now we use PIPEFRAME. > > There's also a check to see if the pipe is stopped. > > Signed-off-by: Paulo Zanoni > --- > drivers/gpu/drm/i915/intel_display.c | 21 +++++++++++++++++++++ > 1 file changed, 21 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index 613f871..5036efe 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -806,6 +806,22 @@ intel_find_pll_g4x_dp(const intel_limit_t *limit, struct drm_crtc *crtc, > return true; > } > > +static void ironlake_wait_for_vblank(struct drm_device *dev, int pipe) > +{ > + struct drm_i915_private *dev_priv = dev->dev_private; > + u32 frame, frame_reg = PIPEFRAME(pipe); > + u32 pipeconf = I915_READ(PIPECONF(pipe)); > + > + if (!((pipeconf & PIPECONF_ENABLE) && > + (pipeconf & I965_PIPECONF_ACTIVE))) > + return; Hm, why do we have this check here? The other wait_for_vblank implementation doesn't bother with this. And if we call wait_for_vblank on a disabled pipe, that's a bug imo. -Daniel > + > + frame = I915_READ(frame_reg); > + > + if (wait_for(I915_READ_NOTRACE(frame_reg) != frame, 50)) > + DRM_DEBUG_KMS("vblank wait timed out\n"); > +} > + > /** > * intel_wait_for_vblank - wait for vblank on a given pipe > * @dev: drm device > @@ -819,6 +835,11 @@ void intel_wait_for_vblank(struct drm_device *dev, int pipe) > struct drm_i915_private *dev_priv = dev->dev_private; > int pipestat_reg = PIPESTAT(pipe); > > + if (INTEL_INFO(dev)->gen >= 5) { > + ironlake_wait_for_vblank(dev, pipe); > + return; > + } > + > /* Clear existing vblank status. Note this will clear any other > * sticky status fields as well. > * > -- > 1.7.10 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Mail: daniel@ffwll.ch Mobile: +41 (0)79 365 57 48