From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH 04/14] drm/i915: touch the DIP control register after enabling the HDMI port Date: Tue, 8 May 2012 13:59:50 +0200 Message-ID: <20120508115950.GE4802@phenom.ffwll.local> References: <1336010154-2946-1-git-send-email-przanoni@gmail.com> <1336162707-3504-1-git-send-email-przanoni@gmail.com> <1336162707-3504-3-git-send-email-przanoni@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-ee0-f49.google.com (mail-ee0-f49.google.com [74.125.83.49]) by gabe.freedesktop.org (Postfix) with ESMTP id 817589EE9D for ; Tue, 8 May 2012 04:58:42 -0700 (PDT) Received: by eekd17 with SMTP id d17so626377eek.36 for ; Tue, 08 May 2012 04:58:41 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1336162707-3504-3-git-send-email-przanoni@gmail.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Paulo Zanoni Cc: intel-gfx@lists.freedesktop.org, Paulo Zanoni List-Id: intel-gfx@lists.freedesktop.org On Fri, May 04, 2012 at 05:18:16PM -0300, Paulo Zanoni wrote: > From: Paulo Zanoni > > This is not documented anywhere, but it seems necessary to make the > InfoFrames work, especially when all you have is an HDMI monitor. > > Some bugs get fixed just by running "./intel_infoframes -d". This > patch fixes this problem on my machine. > > Signed-off-by: Paulo Zanoni Can you elaborate a bit on which machines really need this? I fear that we're adding a hack here which is only required on a few chips and then keep it around forever ... -Daniel > --- > drivers/gpu/drm/i915/intel_hdmi.c | 22 ++++++++++++++++++++++ > 1 file changed, 22 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c > index 1eef50d..8646a50 100644 > --- a/drivers/gpu/drm/i915/intel_hdmi.c > +++ b/drivers/gpu/drm/i915/intel_hdmi.c > @@ -113,6 +113,20 @@ static u32 intel_infoframe_flags(struct dip_infoframe *frame) > return flags; > } > > +static u32 intel_get_dip_ctl_reg(struct drm_encoder *encoder) > +{ > + struct drm_device *dev = encoder->dev; > + struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); > + > + if (!HAS_PCH_SPLIT(dev)) { > + return VIDEO_DIP_CTL; > + } else if (IS_VALLEYVIEW(dev)) { > + return VLV_TVIDEO_DIP_CTL(intel_crtc->pipe); > + } else { > + return TVIDEO_DIP_CTL(intel_crtc->pipe); > + } > +} > + > static void i9xx_write_infoframe(struct drm_encoder *encoder, > struct dip_infoframe *frame) > { > @@ -331,6 +345,14 @@ static void intel_hdmi_dpms(struct drm_encoder *encoder, int mode) > I915_WRITE(intel_hdmi->sdvox_reg, temp); > POSTING_READ(intel_hdmi->sdvox_reg); > } > + > + if ((mode == DRM_MODE_DPMS_ON) && encoder->crtc) { > + /* We've just enabled the HDMI port. Now we need to touch the > + * DIP control register to make sure the infoframes are sent. > + */ > + u32 dip_reg = intel_get_dip_ctl_reg(encoder); > + I915_WRITE(dip_reg, I915_READ(dip_reg)); > + } > } > > static int intel_hdmi_mode_valid(struct drm_connector *connector, > -- > 1.7.10 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Mail: daniel@ffwll.ch Mobile: +41 (0)79 365 57 48