From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH 13/14] drm/i915: fix initial IRQ masking on VLV Date: Wed, 20 Jun 2012 15:12:00 +0200 Message-ID: <20120620131200.GH7170@phenom.ffwll.local> References: <1339786526-16747-1-git-send-email-jbarnes@virtuousgeek.org> <1339786526-16747-13-git-send-email-jbarnes@virtuousgeek.org> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-bk0-f49.google.com (mail-bk0-f49.google.com [209.85.214.49]) by gabe.freedesktop.org (Postfix) with ESMTP id 9FFF89E824 for ; Wed, 20 Jun 2012 06:10:27 -0700 (PDT) Received: by bkwj4 with SMTP id j4so6950474bkw.36 for ; Wed, 20 Jun 2012 06:10:26 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1339786526-16747-13-git-send-email-jbarnes@virtuousgeek.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Jesse Barnes Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Fri, Jun 15, 2012 at 11:55:25AM -0700, Jesse Barnes wrote: > We can leave vblank interrupts masked but enabled so we're not dependent > on the first client to toggle the disable timer. We can also mask all > render based interrupts, since the ring code will handle unmasking them > for us. > > Signed-off-by: Jesse Barnes > --- > drivers/gpu/drm/i915/i915_irq.c | 12 +++++++++--- > 1 file changed, 9 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c > index 36732f7..5c6c5e9 100644 > --- a/drivers/gpu/drm/i915/i915_irq.c > +++ b/drivers/gpu/drm/i915/i915_irq.c > @@ -1889,7 +1889,13 @@ static int valleyview_irq_postinstall(struct drm_device *dev) > I915_DISPLAY_PIPE_B_EVENT_INTERRUPT | > I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT; > > - dev_priv->irq_mask = ~enable_mask; > + /* > + *Leave vblank interrupts masked initially. enable/disable will > + * toggle them based on usage. > + */ > + dev_priv->irq_mask = (~enable_mask) | > + I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT | > + I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT; > > dev_priv->pipestat[0] = 0; > dev_priv->pipestat[1] = 0; Please squash this hunk here with the vlv pageflip patch - this little fumble decently confused me while reviewing the patchflip patch. > @@ -1925,11 +1931,11 @@ static int valleyview_irq_postinstall(struct drm_device *dev) > GT_SYNC_STATUS | > GT_USER_INTERRUPT; > > - dev_priv->gt_irq_mask = ~render_irqs; > + dev_priv->gt_irq_mask = ~0; > > I915_WRITE(GTIIR, I915_READ(GTIIR)); > I915_WRITE(GTIIR, I915_READ(GTIIR)); > - I915_WRITE(GTIMR, 0); > + I915_WRITE(GTIMR, dev_priv->gt_irq_mask); > I915_WRITE(GTIER, render_irqs); > POSTING_READ(GTIER); Presuming I haven't missed anything, render_irqs is now an unused variable. Please also rip that out, but leave the gt_irq frobbing in a separate patch. -Daniel > > -- > 1.7.9.5 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Mail: daniel@ffwll.ch Mobile: +41 (0)79 365 57 48