From mboxrd@z Thu Jan  1 00:00:00 1970
From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= <ville.syrjala@linux.intel.com>
Subject: Re: [PATCH v2] drm/i915: Cantiga+ cannot handle a hsync
 front porch of 0
Date: Thu, 21 Jun 2012 15:16:42 +0300
Message-ID: <20120621121642.GZ13065@intel.com>
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To: Jani Nikula <jani.nikula@intel.com>
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On Thu, Jun 21, 2012 at 01:19:59PM +0300, Jani Nikula wrote:
> From: Chris Wilson <chris@chris-wilson.co.uk>
> =

> This addresses WaPruneModeWithIncorrectHsyncOffset.
> =

> Bugzilla: http://bugs.freedesktop.org/show_bug.cgi?id=3D50236
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> =

> ---
> =

> v2: drop patch 1/2, to be addressed later.
> ---
>  drivers/gpu/drm/i915/intel_display.c |    7 +++++++
>  1 files changed, 7 insertions(+), 0 deletions(-)
> =

> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/=
intel_display.c
> index 9730162..76516b9 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -3420,6 +3420,13 @@ static bool intel_crtc_mode_fixup(struct drm_crtc =
*crtc,
>  	if (!(adjusted_mode->private_flags & INTEL_MODE_CRTC_TIMINGS_SET))
>  		drm_mode_set_crtcinfo(adjusted_mode, 0);
>  =

> +	/* WaPruneModeWithIncorrectHsyncOffset: Cantiga+ cannot handle modes
> +	 * with a hsync front porch of 0.
> +	 */
> +	if ((INTEL_INFO(dev)->gen > 4 || IS_G4X(dev)) &&
> +		adjusted_mode->hsync_start =3D=3D adjusted_mode->hdisplay)
> +		return false;

Rejecting the mode seems quite drastic for something as small as this.
How about we just push hsync_start forward a little bit?

-- =

Ville Syrj=E4l=E4
Intel OTC