From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH] drm/i915: Add comments to explain the BSD tail write workaround Date: Wed, 11 Jul 2012 00:47:07 +0200 Message-ID: <20120710224707.GE5108@phenom.ffwll.local> References: <1341501913-7009-1-git-send-email-chris@chris-wilson.co.uk> <1341504841-7832-1-git-send-email-chris@chris-wilson.co.uk> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-wg0-f43.google.com (mail-wg0-f43.google.com [74.125.82.43]) by gabe.freedesktop.org (Postfix) with ESMTP id B7B789EBA3 for ; Tue, 10 Jul 2012 15:47:07 -0700 (PDT) Received: by wgbdr1 with SMTP id dr1so394912wgb.12 for ; Tue, 10 Jul 2012 15:47:06 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1341504841-7832-1-git-send-email-chris@chris-wilson.co.uk> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Chris Wilson Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Thu, Jul 05, 2012 at 05:14:01PM +0100, Chris Wilson wrote: > Having had to dive into the bspec to understand what each stage of the > workaround meant, and how that the ring broadcasting IDLE corresponded > with the GT powering down the ring (i.e. rc6) add comments to aide > the next reader. > > And since the register "is used to control all aspects of PSMI and power > saving functions" that makes it quite interesting to inspect with > regards to RC6 hangs, so add it to the error-state. > > v2: Rediscover the piece of magic, set the RNCID to 0 before waiting for > the ring to wake up. > > Signed-off-by: Chris Wilson Queued for -next, thanks for the patch. -Daniel -- Daniel Vetter Mail: daniel@ffwll.ch Mobile: +41 (0)79 365 57 48