From mboxrd@z Thu Jan  1 00:00:00 1970
From: Daniel Vetter <daniel@ffwll.ch>
Subject: Re: [PATCH] agp/intel,
 drm/i915: Use a write-combining map for updating PTEs
Date: Sun, 12 Aug 2012 17:47:46 +0200
Message-ID: <20120812154746.GF5575@phenom.ffwll.local>
References: <1344769479-3237-1-git-send-email-chris@chris-wilson.co.uk>
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: 7bit
Return-path: <intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org>
Received: from mail-we0-f177.google.com (mail-we0-f177.google.com
	[74.125.82.177])
	by gabe.freedesktop.org (Postfix) with ESMTP id 18FD49E7EB
	for <intel-gfx@lists.freedesktop.org>;
	Sun, 12 Aug 2012 08:47:25 -0700 (PDT)
Received: by weyr3 with SMTP id r3so2170671wey.36
	for <intel-gfx@lists.freedesktop.org>;
	Sun, 12 Aug 2012 08:47:25 -0700 (PDT)
Content-Disposition: inline
In-Reply-To: <1344769479-3237-1-git-send-email-chris@chris-wilson.co.uk>
List-Unsubscribe: <http://lists.freedesktop.org/mailman/options/intel-gfx>,
	<mailto:intel-gfx-request@lists.freedesktop.org?subject=unsubscribe>
List-Archive: <http://lists.freedesktop.org/archives/intel-gfx>
List-Post: <mailto:intel-gfx@lists.freedesktop.org>
List-Help: <mailto:intel-gfx-request@lists.freedesktop.org?subject=help>
List-Subscribe: <http://lists.freedesktop.org/mailman/listinfo/intel-gfx>,
	<mailto:intel-gfx-request@lists.freedesktop.org?subject=subscribe>
Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org
Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: intel-gfx@lists.freedesktop.org
List-Id: intel-gfx@lists.freedesktop.org

On Sun, Aug 12, 2012 at 12:04:39PM +0100, Chris Wilson wrote:
> In order to be able to ioremap_wc the GTT space, we need to remove the
> conflicting pci_iomap from drm/i915, so we limit the register map in
> drm/i915 to the suitable range for each generation. The benefit of doing
> this is an order of magnitude reduction in time spent rewriting the GTT
> entries when inserting and removing objects. For example, this halves the
> CPU time spent in X when pushing pixels for chromium through a userptr
> (chromium has a bug where it likes to recreate its ShmPixmap on every
> draw).
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

How well does this work with ums?

I guess if it blows up, we could ioremap uncached, but when kms
initializes drop that uc mapping and try to remap wc. But I fear that ums
will map the entire bar and hence we can't just unconditionally map the
gatt wc.
-Daniel
-- 
Daniel Vetter
Mail: daniel@ffwll.ch
Mobile: +41 (0)79 365 57 48