From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH 1/2] drm/i915: Limit the ioremap of the PCI bar to the registers Date: Fri, 14 Sep 2012 23:27:46 +0200 Message-ID: <20120914212746.GH5799@phenom.ffwll.local> References: <1347620267-11275-1-git-send-email-chris@chris-wilson.co.uk> <20120914115030.5a11a2ee@bwidawsk.net> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-wi0-f177.google.com (mail-wi0-f177.google.com [209.85.212.177]) by gabe.freedesktop.org (Postfix) with ESMTP id A560F9E7D0 for ; Fri, 14 Sep 2012 14:27:11 -0700 (PDT) Received: by wibhn17 with SMTP id hn17so265792wib.12 for ; Fri, 14 Sep 2012 14:27:10 -0700 (PDT) Content-Disposition: inline In-Reply-To: <20120914115030.5a11a2ee@bwidawsk.net> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Ben Widawsky Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Fri, Sep 14, 2012 at 11:50:30AM -0700, Ben Widawsky wrote: > On Fri, 14 Sep 2012 11:57:46 +0100 > Chris Wilson wrote: > > > In the future we may like to experiment with using a WC map of the GTT > > portion. However, that will conflict with i915.ko mapping the entire bar > > as UC in order to access the GPU registers. Instead we can shrink the > > register ioremap to only map the register block. > > > > Signed-off-by: Chris Wilson > > Since I really don't want to pull out docs for anything less than > gen6... > Tested-by (IVB): Ben Widawsky > Acked-by: Ben Widawsky Both patches merged, with the commit message frobbed. Thanks, Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch