From mboxrd@z Thu Jan  1 00:00:00 1970
From: Ben Widawsky <ben@bwidawsk.net>
Subject: Re: [PATCH 06/12] drm/i915: implement
 WaDisableVLVClockGating_VBIIssue on VLV
Date: Tue, 2 Oct 2012 16:38:40 -0700
Message-ID: <20121002163840.2ac7c285@bwidawsk.net>
References: <1349217826-2538-1-git-send-email-jbarnes@virtuousgeek.org>
	<1349217826-2538-7-git-send-email-jbarnes@virtuousgeek.org>
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: 7bit
Return-path: <intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org>
Received: from shiva.chad-versace.us (209-20-75-48.static.cloud-ips.com
	[209.20.75.48])
	by gabe.freedesktop.org (Postfix) with ESMTP id 022699E7B5
	for <intel-gfx@lists.freedesktop.org>;
	Tue,  2 Oct 2012 16:38:53 -0700 (PDT)
In-Reply-To: <1349217826-2538-7-git-send-email-jbarnes@virtuousgeek.org>
List-Unsubscribe: <http://lists.freedesktop.org/mailman/options/intel-gfx>,
	<mailto:intel-gfx-request@lists.freedesktop.org?subject=unsubscribe>
List-Archive: <http://lists.freedesktop.org/archives/intel-gfx>
List-Post: <mailto:intel-gfx@lists.freedesktop.org>
List-Help: <mailto:intel-gfx-request@lists.freedesktop.org?subject=help>
List-Subscribe: <http://lists.freedesktop.org/mailman/listinfo/intel-gfx>,
	<mailto:intel-gfx-request@lists.freedesktop.org?subject=subscribe>
Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org
Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org
To: Jesse Barnes <jbarnes@virtuousgeek.org>
Cc: intel-gfx@lists.freedesktop.org
List-Id: intel-gfx@lists.freedesktop.org

On Tue,  2 Oct 2012 17:43:40 -0500
Jesse Barnes <jbarnes@virtuousgeek.org> wrote:

> This allows us to get the right vblank interrupt frequency.
> 
> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> ---
>  drivers/gpu/drm/i915/intel_pm.c |    7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 0659317..828629b 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3687,6 +3687,13 @@ static void valleyview_init_clock_gating(struct drm_device *dev)
>  		   PIPEA_HLINE_INT_EN | PIPEA_VBLANK_INT_EN |
>  		   SPRITEB_FLIPDONE_INT_EN | SPRITEA_FLIPDONE_INT_EN |
>  		   PLANEA_FLIPDONE_INT_EN);
> +
> +	/*
> +	 * WaDisableVLVClockGating_VBIIssue
> +	 * Disable clock gating on th GCFG unit to prevent a delay
> +	 * in the reporting of vblank events.
> +	 */
> +	I915_WRITE(VLV_GUNIT_CLOCK_GATE, GCFG_DIS);
>  }
>  
>  static void g4x_init_clock_gating(struct drm_device *dev)


This seems like only X0.


-- 
Ben Widawsky, Intel Open Source Technology Center