From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH 3/3] drm/i915: don't rewrite the GTT on resume v2 Date: Tue, 30 Oct 2012 18:59:31 +0100 Message-ID: <20121030175931.GA5755@phenom.ffwll.local> References: <1351271318-3148-1-git-send-email-jbarnes@virtuousgeek.org> <1351271318-3148-3-git-send-email-jbarnes@virtuousgeek.org> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-ee0-f49.google.com (mail-ee0-f49.google.com [74.125.83.49]) by gabe.freedesktop.org (Postfix) with ESMTP id 22BB1A0A52 for ; Tue, 30 Oct 2012 10:58:36 -0700 (PDT) Received: by mail-ee0-f49.google.com with SMTP id c1so321441eek.36 for ; Tue, 30 Oct 2012 10:58:36 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1351271318-3148-3-git-send-email-jbarnes@virtuousgeek.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Jesse Barnes Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Fri, Oct 26, 2012 at 10:08:38AM -0700, Jesse Barnes wrote: > The BIOS shouldn't be touching this memory across suspend/resume, so > just leave it alone. This saves us ~50ms on resume on my T420. > > v2: change gtt restore default on pre-gen4 (Chris) > move needs_gtt_restore flag into dev_priv > > Signed-off-by: Jesse Barnes I've just realized: GGTT PTEs are stored in stolen mem, and hence not restored accross S4. -Daniel > --- > drivers/gpu/drm/i915/i915_dma.c | 4 ++++ > drivers/gpu/drm/i915/i915_drv.c | 3 ++- > drivers/gpu/drm/i915/i915_drv.h | 2 ++ > 3 files changed, 8 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c > index b5977b4..c027266 100644 > --- a/drivers/gpu/drm/i915/i915_dma.c > +++ b/drivers/gpu/drm/i915/i915_dma.c > @@ -1339,6 +1339,10 @@ static int i915_load_modeset_init(struct drm_device *dev) > /* FIXME: do pre/post-mode set stuff in core KMS code */ > dev->vblank_disable_allowed = 1; > > + /* Gen4+ should have saner BIOSes (we hope) */ > + if (INTEL_INFO(dev)->gen < 4) > + dev_priv->needs_gtt_restore = true; > + > ret = intel_fbdev_init(dev); > if (ret) > goto cleanup_irq; > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c > index 4d858a9..be9f47d 100644 > --- a/drivers/gpu/drm/i915/i915_drv.c > +++ b/drivers/gpu/drm/i915/i915_drv.c > @@ -540,7 +540,8 @@ static int i915_drm_thaw(struct drm_device *dev) > > intel_gt_reset(dev); > > - if (drm_core_check_feature(dev, DRIVER_MODESET)) { > + if (drm_core_check_feature(dev, DRIVER_MODESET) && > + dev_priv->needs_gtt_restore) { > mutex_lock(&dev->struct_mutex); > i915_gem_restore_gtt_mappings(dev); > mutex_unlock(&dev->struct_mutex); > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index 1e84a59..a38eba8 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -873,6 +873,8 @@ typedef struct drm_i915_private { > > struct delayed_work gen6_power_work; > > + bool needs_gtt_restore; > + > enum no_fbc_reason no_fbc_reason; > > struct drm_mm_node *compressed_fb; > -- > 1.7.9.5 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch