From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [RFC] Async flips Date: Wed, 31 Oct 2012 18:05:17 +0200 Message-ID: <20121031160517.GF3791@intel.com> References: <1351622029-2276-1-git-send-email-jbarnes@virtuousgeek.org> <20121031125324.GD3791@intel.com> <20121031082349.37933396@jbarnes-desktop> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id 0FDD4A0E4D for ; Wed, 31 Oct 2012 09:05:20 -0700 (PDT) Content-Disposition: inline In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Daniel Vetter Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Wed, Oct 31, 2012 at 04:26:54PM +0100, Daniel Vetter wrote: > On Wed, Oct 31, 2012 at 4:23 PM, Jesse Barnes = wrote: > > > >> On Tue, Oct 30, 2012 at 01:33:47PM -0500, Jesse Barnes wrote: > >> > The hw supports async flips through the render ring, so why not expo= se it? > >> > It gives us one more "tear me harder" option we can use in the DDX a= nd > >> > for other cases where simply flipping to the latest buffer is more > >> > important than visual quality. > >> > >> The only reason I can see why anyone would really want async flips is > >> when you're restricted to double buffering. With triple buffering you > >> should be able to override the previous flip w/o tearing. > >> > >> Well, actually if you use the ring based flips, then you can't do the > >> override. My atomic page flip code can do it because it's using mmio > >> flips. There were also other reasons favoring mmio over ring. > >> > >> Once the atomic code is deemed ready, I would suggest we just nuke the > >> ring based flip code (pun intended). > > > > Yeah, I agree. In fact one of the first versions of the flip code used > > mmio, and I think it's a better way to go. > = > How are we gonna sync up with outstanding rendering before issuing the > flip? If the answer is involves enabling the render irq, I'm not gonna > like it ;-) That's currently the only major TODO item on my list. Currently the ioctl just ends up blocking when I pin the buffers, but I need some async method to avoid that. So yes, irqs seem like the right approach here. What's the problem w/ irqs? -- = Ville Syrj=E4l=E4 Intel OTC