From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH 11/11] drm/i915: Introduce intel_crtc_update_sarea_pos() Date: Thu, 1 Nov 2012 00:02:12 +0100 Message-ID: <20121031230212.GL5755@phenom.ffwll.local> References: <1351698624-26626-1-git-send-email-ville.syrjala@linux.intel.com> <1351698624-26626-12-git-send-email-ville.syrjala@linux.intel.com> <20121031132748.43154e69@jbarnes-desktop> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mail-ea0-f177.google.com (mail-ea0-f177.google.com [209.85.215.177]) by gabe.freedesktop.org (Postfix) with ESMTP id D7A839EB31 for ; Wed, 31 Oct 2012 16:01:07 -0700 (PDT) Received: by mail-ea0-f177.google.com with SMTP id n13so775619eaa.36 for ; Wed, 31 Oct 2012 16:01:06 -0700 (PDT) Content-Disposition: inline In-Reply-To: <20121031132748.43154e69@jbarnes-desktop> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Jesse Barnes Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Wed, Oct 31, 2012 at 01:27:48PM -0700, Jesse Barnes wrote: > On Wed, 31 Oct 2012 17:50:24 +0200 > ville.syrjala@linux.intel.com wrote: > = > > From: Ville Syrj=E4l=E4 > > = > > Refactor the code that stores the panning x/y position into the sarea. > > = > > This also changes the code so that it won't mistakenly update > > sareaB_x/y for pipe >=3D C. > > = > > Signed-off-by: Ville Syrj=E4l=E4 I've slurped in the patches that Jesse reviewed from this series, safe for the 2nd patch which somehow fails to apply. To be a good maintainer, I've fixed up a conflict with the sprite offset adjustment code from Damien though ;-) Thanks, Daniel > > --- > > drivers/gpu/drm/i915/intel_display.c | 43 ++++++++++++++++++++++----= -------- > > 1 files changed, 28 insertions(+), 15 deletions(-) > > = > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i91= 5/intel_display.c > > index e75156a..cbc0035 100644 > > --- a/drivers/gpu/drm/i915/intel_display.c > > +++ b/drivers/gpu/drm/i915/intel_display.c > > @@ -2195,13 +2195,39 @@ intel_finish_fb(struct drm_framebuffer *old_fb) > > return ret; > > } > > = > > +static void intel_crtc_update_sarea_pos(struct drm_crtc *crtc, int x, = int y) > > +{ > > + struct drm_device *dev =3D crtc->dev; > > + struct drm_i915_master_private *master_priv; > > + struct intel_crtc *intel_crtc =3D to_intel_crtc(crtc); > > + > > + if (!dev->primary->master) > > + return; > > + > > + master_priv =3D dev->primary->master->driver_priv; > > + if (!master_priv->sarea_priv) > > + return; > > + > > + switch (intel_crtc->pipe) { > > + case 0: > > + master_priv->sarea_priv->pipeA_x =3D x; > > + master_priv->sarea_priv->pipeA_y =3D y; > > + break; > > + case 1: > > + master_priv->sarea_priv->pipeB_x =3D x; > > + master_priv->sarea_priv->pipeB_y =3D y; > > + break; > > + default: > > + break; > > + } > > +} > > + > > static int > > intel_pipe_set_base(struct drm_crtc *crtc, int x, int y, > > struct drm_framebuffer *fb) > > { > > struct drm_device *dev =3D crtc->dev; > > struct drm_i915_private *dev_priv =3D dev->dev_private; > > - struct drm_i915_master_private *master_priv; > > struct intel_crtc *intel_crtc =3D to_intel_crtc(crtc); > > struct drm_framebuffer *old_fb; > > int ret; > > @@ -2253,20 +2279,7 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x= , int y, > > intel_update_fbc(dev); > > mutex_unlock(&dev->struct_mutex); > > = > > - if (!dev->primary->master) > > - return 0; > > - > > - master_priv =3D dev->primary->master->driver_priv; > > - if (!master_priv->sarea_priv) > > - return 0; > > - > > - if (intel_crtc->pipe) { > > - master_priv->sarea_priv->pipeB_x =3D x; > > - master_priv->sarea_priv->pipeB_y =3D y; > > - } else { > > - master_priv->sarea_priv->pipeA_x =3D x; > > - master_priv->sarea_priv->pipeA_y =3D y; > > - } > > + intel_crtc_update_sarea_pos(crtc, x, y); > > = > > return 0; > > } > = > Reviewed-by: Jesse Barnes > = > -- = > Jesse Barnes, Intel Open Source Technology Center > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- = Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch