From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH] drm/i915: CPT/PPT pch dp transcoder workaround Date: Thu, 1 Nov 2012 16:33:45 +0100 Message-ID: <20121101153345.GV5755@phenom.ffwll.local> References: <1351720351-2688-4-git-send-email-daniel.vetter@ffwll.ch> <1351757730-11463-1-git-send-email-daniel.vetter@ffwll.ch> <20121101073736.49cc9c43@jbarnes-desktop> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-ea0-f177.google.com (mail-ea0-f177.google.com [209.85.215.177]) by gabe.freedesktop.org (Postfix) with ESMTP id B57659E75A for ; Thu, 1 Nov 2012 08:32:39 -0700 (PDT) Received: by mail-ea0-f177.google.com with SMTP id n13so1040688eaa.36 for ; Thu, 01 Nov 2012 08:32:38 -0700 (PDT) Content-Disposition: inline In-Reply-To: <20121101073736.49cc9c43@jbarnes-desktop> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Jesse Barnes Cc: Daniel Vetter , Intel Graphics Development , Arthur Ranyan List-Id: intel-gfx@lists.freedesktop.org On Thu, Nov 01, 2012 at 07:37:36AM -0700, Jesse Barnes wrote: > > v3: Paulo Zanoni pointed out that this workaround is also required on > > the LPT PCH. And Arthur Ranyan confirmed that this workaround is > > requierd for all ports on the pch, not just DP: The important part > > is that the bit is set whenever the pch transcoder is enabled, and > > that it is _not_ set while the fdi link is trained. It is also > > important that the pch transcoder is fully disabled, i.e. we have to > > wait for bit 30 to clear before clearing the w/a bit. See above: "Paulo Zanoni pointed out that this workaround is also required on the LPT PCH". > > + if (!HAS_PCH_IBX(dev)) { > > + /* Workaround: Set the timing override bit before enabling the > > + * pch transcoder. */ > > + reg = TRANS_CHICKEN2(pipe); > > + val = I915_READ(reg); > > + val |= TRANS_CHICKEN2_TIMING_OVERRIDE; > > + I915_WRITE(reg, val); > > + } > > I'd like this better if it were HAS_PCH_CPT; we use that as a synonym > for PPT elsehwere, and it shouldn't apply to LPT right? I see LPT has > the bit, but I don't know if it's needed (the changelong and summary > are misleading if so). Paulo's vga patch bomb will split this up, so we can use HAS_PCH_CPT instead of !IBX. But since I've written this patch against dinq without paulo's patches, hence HAS_CPT would be wrong. So: What colour would please you most, Sir? Cheers, Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch