From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH 8/8] drm/i915: add clock gating regs to VLV offset check function Date: Fri, 2 Nov 2012 16:34:26 +0100 Message-ID: <20121102153426.GL5755@phenom.ffwll.local> References: <1351192548-2992-1-git-send-email-jbarnes@virtuousgeek.org> <1351192548-2992-8-git-send-email-jbarnes@virtuousgeek.org> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-ee0-f49.google.com (mail-ee0-f49.google.com [74.125.83.49]) by gabe.freedesktop.org (Postfix) with ESMTP id F0EDA9E860 for ; Fri, 2 Nov 2012 08:33:19 -0700 (PDT) Received: by mail-ee0-f49.google.com with SMTP id c1so1922151eek.36 for ; Fri, 02 Nov 2012 08:33:19 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1351192548-2992-8-git-send-email-jbarnes@virtuousgeek.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Jesse Barnes Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Thu, Oct 25, 2012 at 12:15:48PM -0700, Jesse Barnes wrote: > So we can write them properly. > > Signed-off-by: Jesse Barnes Slurped in the entire series, thanks for the patches. -Daniel > --- > drivers/gpu/drm/i915/i915_drv.c | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c > index d4b3507..fb4b816 100644 > --- a/drivers/gpu/drm/i915/i915_drv.c > +++ b/drivers/gpu/drm/i915/i915_drv.c > @@ -1129,8 +1129,17 @@ static bool IS_DISPLAYREG(u32 reg) > return false; > > switch (reg) { > + case _3D_CHICKEN3: > + case IVB_CHICKEN3: > + case GEN7_COMMON_SLICE_CHICKEN1: > + case GEN7_L3CNTLREG1: > + case GEN7_L3_CHICKEN_MODE_REGISTER: > case GEN7_ROW_CHICKEN2: > + case GEN7_L3SQCREG4: > + case GEN7_SQ_CHICKEN_MBCUNIT_CONFIG: > case GEN7_HALF_SLICE_CHICKEN1: > + case GEN6_MBCTL: > + case GEN6_UCGCTL2: > return false; /me screams > default: > break; > -- > 1.7.9.5 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch