From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jesse Barnes Subject: Re: [PATCH 4/4] drm/i915: don't rewrite the GTT on resume v4 Date: Fri, 2 Nov 2012 16:28:31 -0700 Message-ID: <20121102162831.400a9e30@jbarnes-desktop> References: <1351880042-24935-1-git-send-email-jbarnes@virtuousgeek.org> <1351880042-24935-4-git-send-email-jbarnes@virtuousgeek.org> <20121102225504.GN5755@phenom.ffwll.local> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from oproxy11-pub.bluehost.com (oproxy11-pub.bluehost.com [173.254.64.10]) by gabe.freedesktop.org (Postfix) with SMTP id 32BFA9E917 for ; Fri, 2 Nov 2012 16:28:19 -0700 (PDT) In-Reply-To: <20121102225504.GN5755@phenom.ffwll.local> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Daniel Vetter Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Fri, 2 Nov 2012 23:55:04 +0100 Daniel Vetter wrote: > On Fri, Nov 02, 2012 at 11:14:02AM -0700, Jesse Barnes wrote: > > The BIOS shouldn't be touching this memory across suspend/resume, so > > just leave it alone. This saves us ~6ms on resume on my T420 (retested > > with write combined PTEs). > > > > v2: change gtt restore default on pre-gen4 (Chris) > > move needs_gtt_restore flag into dev_priv > > v3: make sure we restore GTT on resume from hibernate (Daniel) > > use opregion support as the cutoff for restore from resume (Chris) > > v4: use a better check for opregion (Chris) > > > > Reviewed-by: Chris Wilson > > Signed-off-by: Jesse Barnes > > Merged, with some bikeshed applied, and the less-than-careful locking > switch in patch 3 fixed. Please check whether I haven't botched it up. Hm I even changed the name of the rps struct to catch all the cases at compile time. Maybe I sent out an old version or forgot a git add... thanks for fixing it up. -- Jesse Barnes, Intel Open Source Technology Center