From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH] drm/i915: Always calculate 8xx WM values based on a 32-bpp framebuffer Date: Sat, 10 Nov 2012 14:39:27 +0100 Message-ID: <20121110133927.GE5854@phenom.ffwll.local> References: <1350905535-4957-1-git-send-email-chris@chris-wilson.co.uk> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-ee0-f49.google.com (mail-ee0-f49.google.com [74.125.83.49]) by gabe.freedesktop.org (Postfix) with ESMTP id E60139E92B for ; Sat, 10 Nov 2012 05:38:13 -0800 (PST) Received: by mail-ee0-f49.google.com with SMTP id c1so2662765eek.36 for ; Sat, 10 Nov 2012 05:38:13 -0800 (PST) Content-Disposition: inline In-Reply-To: <1350905535-4957-1-git-send-email-chris@chris-wilson.co.uk> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Chris Wilson Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Mon, Oct 22, 2012 at 12:32:15PM +0100, Chris Wilson wrote: > The specs for gen2 say that the watermark values "should always be set > assuming a 32bpp display mode, even though the display mode may be 15 or > 16 bpp." > > Signed-off-by: Chris Wilson Queued for -next, thanks for the patch. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch