From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [RFC] Async flips Date: Mon, 12 Nov 2012 14:04:40 +0200 Message-ID: <20121112120440.GE3791@intel.com> References: <1351622029-2276-1-git-send-email-jbarnes@virtuousgeek.org> <20121031125324.GD3791@intel.com> <87625qpmcw.fsf@eliezer.anholt.net> <20121031185118.GJ3791@intel.com> <50934FE9.2000408@tuebingen.mpg.de> <20121102092938.GT3791@intel.com> <50A072A6.6060000@tuebingen.mpg.de> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga03.intel.com (mga03.intel.com [143.182.124.21]) by gabe.freedesktop.org (Postfix) with ESMTP id 580DD9E8AE for ; Mon, 12 Nov 2012 04:04:45 -0800 (PST) Content-Disposition: inline In-Reply-To: <50A072A6.6060000@tuebingen.mpg.de> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Mario Kleiner Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Mon, Nov 12, 2012 at 04:53:10AM +0100, Mario Kleiner wrote: > On 02.11.12 10:29, Ville Syrj=E4l=E4 wrote: > > On Fri, Nov 02, 2012 at 05:45:29AM +0100, Mario Kleiner wrote: > >> d) Flipping without vsync =3D tearing. I think this is at least useful= for > >> benchmarks, although not for anything else. > > > > This one I don't support curently. It would be possible to support it > > (assuming the HW allows it). The simplest way would be to just add a > > new flag to the ioctl to control this behaviour. > > > = > I think that's what Jesse's patches are supposed to add. Yes, but it adds it to the current page flip path, which has nothing to do with the atomic code. -- = Ville Syrj=E4l=E4 Intel OTC