From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ben Widawsky Subject: Re: [PATCH] drm/i915: Use LRI to update the semaphore registers Date: Wed, 14 Nov 2012 11:06:42 -0800 Message-ID: <20121114110642.397ca341@bwidawsk.net> References: <1352884515-10154-1-git-send-email-chris@chris-wilson.co.uk> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from shiva.chad-versace.us (209-20-75-48.static.cloud-ips.com [209.20.75.48]) by gabe.freedesktop.org (Postfix) with ESMTP id D4DF0A087D for ; Wed, 14 Nov 2012 11:06:54 -0800 (PST) In-Reply-To: <1352884515-10154-1-git-send-email-chris@chris-wilson.co.uk> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Chris Wilson Cc: intel-gfx@lists.freedesktop.org, Daniel J Blueman List-Id: intel-gfx@lists.freedesktop.org On Wed, 14 Nov 2012 09:15:14 +0000 Chris Wilson wrote: > The bspec was recently updated to remove the ability to update the > semaphore using the MI_SEMAPHORE_BOX command, the ability to wait upon > the semaphore value remained. Instead the advice is to update the > register using the MI_LOAD_REGISTER_IMM command. In cursory testing, > semaphores continue to function - the question is whether this fixes > some of the deadlocks where the semaphore registers contained stale > values? > > Signed-off-by: Chris Wilson > Cc: Daniel J Blueman Reviewed-by: Ben Widawsky > --- > drivers/gpu/drm/i915/intel_ringbuffer.c | 7 ++----- > 1 file changed, 2 insertions(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c > index ee4abc5..dd2e7db 100644 > --- a/drivers/gpu/drm/i915/intel_ringbuffer.c > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c > @@ -554,12 +554,9 @@ update_mboxes(struct intel_ring_buffer *ring, > u32 seqno, > u32 mmio_offset) > { > - intel_ring_emit(ring, MI_SEMAPHORE_MBOX | > - MI_SEMAPHORE_GLOBAL_GTT | > - MI_SEMAPHORE_REGISTER | > - MI_SEMAPHORE_UPDATE); > - intel_ring_emit(ring, seqno); > + intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1)); > intel_ring_emit(ring, mmio_offset); > + intel_ring_emit(ring, seqno); > } > > /** -- Ben Widawsky, Intel Open Source Technology Center