From mboxrd@z Thu Jan  1 00:00:00 1970
From: Daniel Vetter <daniel@ffwll.ch>
Subject: Re: [PATCH v3] drm/i915: Don't allow ring tail to reach
 the same cacheline as head
Date: Mon, 3 Dec 2012 18:31:54 +0100
Message-ID: <20121203173154.GN4384@phenom.ffwll.local>
References: <1354553012-31964-1-git-send-email-ville.syrjala@linux.intel.com>
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On Mon, Dec 03, 2012 at 06:43:32PM +0200, ville.syrjala@linux.intel.com wro=
te:
> From: Ville Syrj=E4l=E4 <ville.syrjala@linux.intel.com>
> =

> From BSpec:
> "If the Ring Buffer Head Pointer and the Tail Pointer are on the same
> cacheline, the Head Pointer must not be greater than the Tail
> Pointer."
> =

> The easiest way to enforce this is to reduce the reported ring space.
> =

> References:
> Gen2 BSpec "1. Programming Environment" / 1.4.4.6 "Ring Buffer Use"
> Gen3 BSpec "vol1c Memory Interface Functions" / 2.3.4.5 "Ring Buffer Use"
> Gen4+ BSpec "vol1c Memory Interface and Command Stream" / 5.3.4.5 "Ring B=
uffer Use"
> =

> v2: Include the exact BSpec references in the description
> =

> v3: s/64/I915_RING_FREE_SPACE, and add the BSpec information to the code
> =

> Signed-off-by: Ville Syrj=E4l=E4 <ville.syrjala@linux.intel.com>
> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Picked up for -fixes, thanks for the patch.
-Daniel
-- =

Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch