From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH 2/4] drm/i915: Only apply the mb() when flushing the GTT domain during a finish Date: Sat, 19 Jan 2013 14:40:16 +0100 Message-ID: <20130119134016.GA31870@phenom.ffwll.local> References: <6c3329lntgg@orsmga002.jf.intel.com> <1349807080-9005-1-git-send-email-chris@chris-wilson.co.uk> <1349807080-9005-2-git-send-email-chris@chris-wilson.co.uk> <20121011124342.4102105a@jbarnes-desktop> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-ea0-f177.google.com (mail-ea0-f177.google.com [209.85.215.177]) by gabe.freedesktop.org (Postfix) with ESMTP id 1D23EE5D3F for ; Sat, 19 Jan 2013 05:38:17 -0800 (PST) Received: by mail-ea0-f177.google.com with SMTP id n13so1807343eaa.22 for ; Sat, 19 Jan 2013 05:38:17 -0800 (PST) Content-Disposition: inline In-Reply-To: <20121011124342.4102105a@jbarnes-desktop> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Jesse Barnes Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Thu, Oct 11, 2012 at 12:43:42PM -0700, Jesse Barnes wrote: > On Tue, 9 Oct 2012 19:24:38 +0100 > Chris Wilson wrote: > > > Now that we seem to have brought order to the GTT barriers, the last one > > to review is the terminal barrier before we unbind the buffer from the > > GTT. This needs to only be performed if the buffer still resides in the > > GTT domain, and so we can skip some needless barriers otherwise. > > > > Signed-off-by: Chris Wilson > > --- > > drivers/gpu/drm/i915/i915_gem.c | 6 +++--- > > 1 file changed, 3 insertions(+), 3 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c > > index 3c4577b..ed8d21a 100644 > > --- a/drivers/gpu/drm/i915/i915_gem.c > > +++ b/drivers/gpu/drm/i915/i915_gem.c > > @@ -2526,15 +2526,15 @@ static void i915_gem_object_finish_gtt(struct drm_i915_gem_object *obj) > > { > > u32 old_write_domain, old_read_domains; > > > > - /* Act a barrier for all accesses through the GTT */ > > - mb(); > > - > > /* Force a pagefault for domain tracking on next user access */ > > i915_gem_release_mmap(obj); > > > > if ((obj->base.read_domains & I915_GEM_DOMAIN_GTT) == 0) > > return; > > > > + /* Wait for any direct GTT access to complete */ > > + mb(); > > + > > old_read_domains = obj->base.read_domains; > > old_write_domain = obj->base.write_domain; > > > > Yeah this looks like a better place to put it. You're trying to > serialize this against a subsequent fence or map operation? > > Reviewed-by: Jesse Barnes Patches 1-2 queued for next, thanks. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch