From mboxrd@z Thu Jan  1 00:00:00 1970
From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= <ville.syrjala@linux.intel.com>
Subject: Re: [PATCH 29/33] drm/i915: VGA registers need an
 offset on VLV
Date: Fri, 25 Jan 2013 18:24:23 +0200
Message-ID: <20130125162423.GH9135@intel.com>
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To: Daniel Vetter <daniel@ffwll.ch>
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On Fri, Jan 25, 2013 at 05:18:58PM +0100, Daniel Vetter wrote:
> On Fri, Jan 25, 2013 at 12:27:54PM +0200, Ville Syrj=E4l=E4 wrote:
> > On Thu, Jan 24, 2013 at 11:44:09PM +0100, Daniel Vetter wrote:
> > > On Thu, Jan 24, 2013 at 03:29:54PM +0200, ville.syrjala@linux.intel.c=
om wrote:
> > > > From: Ville Syrj=E4l=E4 <ville.syrjala@linux.intel.com>
> > > > =

> > > > Signed-off-by: Ville Syrj=E4l=E4 <ville.syrjala@linux.intel.com>
> > > =

> > > Admittedly I haven't checked them closely, but with my proposed patch=
 in
> > > he modeset_s-r branch, do we still need to adjust these? I kinda don't
> > > want to keep the legacy vga plane registers around ...
> > =

> > I found two exceptions, well, one really.
> > =

> > i915_disable_vga() pokes at one sequencer register.
> =

> Ok, I think we should then only convert that register and add a comment
> about it somewhere. I really hope we can get by without all this legacy
> vga stuff here ...

Yeah I think the sequencer "screen off" bit is the only one the specs
says we need to touch. BTW I suppose we should really touch it in =

i915_redisable_vga() too.

-- =

Ville Syrj=E4l=E4
Intel OTC