From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Wilson Subject: Re: [PATCH] drm/i915: Use I915_MAX_PIPES instead of hardcoded value Date: Wed, 20 Feb 2013 15:07:10 +0000 Message-ID: <20130220150710.GB613@cantiga.alporthouse.com> References: <1361371636-6152-1-git-send-email-ville.syrjala@linux.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id AFF94E67BB for ; Wed, 20 Feb 2013 07:07:20 -0800 (PST) Content-Disposition: inline In-Reply-To: <1361371636-6152-1-git-send-email-ville.syrjala@linux.intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: ville.syrjala@linux.intel.com Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Wed, Feb 20, 2013 at 04:47:16PM +0200, ville.syrjala@linux.intel.com wro= te: > From: Ville Syrj=E4l=E4 > = > The pipestat array size should have space for every pipe in the system. > Use the define we have for it. Tbh, I think that cache should die. I think the hitrate is near zero, and offers no benefit over just writing the register directly. -Chris -- = Chris Wilson, Intel Open Source Technology Centre