From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH 0/8] Enable eDP PSR functionality at HSW - v3 Date: Tue, 5 Mar 2013 00:27:33 +0100 Message-ID: <20130304232732.GD9021@phenom.ffwll.local> References: <1361832922-19801-1-git-send-email-rodrigo.vivi@gmail.com> <20130228180218.GA4469@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mail-ee0-f50.google.com (mail-ee0-f50.google.com [74.125.83.50]) by gabe.freedesktop.org (Postfix) with ESMTP id 67B29E60E3 for ; Mon, 4 Mar 2013 15:25:01 -0800 (PST) Received: by mail-ee0-f50.google.com with SMTP id e51so4383485eek.23 for ; Mon, 04 Mar 2013 15:25:00 -0800 (PST) Content-Disposition: inline In-Reply-To: <20130228180218.GA4469@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Cc: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Thu, Feb 28, 2013 at 08:02:18PM +0200, Ville Syrj=E4l=E4 wrote: > On Thu, Feb 28, 2013 at 02:52:32PM -0300, Paulo Zanoni wrote: > > Hi > > = > > 2013/2/25 Rodrigo Vivi : > > > PSR is an eDP feature that allows power saving even with static image= at eDP screen. > > > > > > v3: Accepted many suggestions that I received at v2 review, fixing, c= leaning and improving the code. > > > > > > v2: Main differences in this v2: > > > - Created vbt struct to get i915 dev_priv more organized and to avoid= adding more stuff into it. > > > - migrated hsw macros to use transcoder instead of pipes than I could= address eDP > > > - remove patch that was only adding edp psr registers and added them = on demand > > > > > > v1: > > > Shobit Kumar has implemented this patch series some time ago, but had= no eDP panel with PSR capability to test them. > > > > > > I could test and verify that this series fully identify PSR capabilit= y and enables it at HSW. > > > I also verified that it saves from 0.5-1W but only when in blank scre= en. It seems it is not really entering in sleeping mode with static image a= t eDP screen yet. > > = > > What do you mean with "blank screen"? It seems we disable PSR before > > blanking the screen, so the 0.5-1W saving could be from the backlight. > > Did you try masking more bits on the SRD_DEBUG register to see if it > > enters PSR more easily? The first test I'd try would be to set 1 to > > all those mask regs and see what happens (maybe we'll enter PSR and > > never ever leave it again?). > = > One thing I'm wondering if we can even enable PSR w/o implementing the > FBC tracking bits. I mean what happens if someone renders to the front > buffer while PSR is active? This is actually my main concern with PSR enabling - our current FBC code is broken, and historically the hw is not one iota better :( Worst case we need to manually detect frontbuffer rendering and disable PSR ... Imo this needs to be resolved before we can enable PSR by default anywhere. -Daniel -- = Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch