From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH 27/28] drm/i915/dp: don't use ILK paths on VLV Date: Wed, 6 Mar 2013 20:04:21 +0100 Message-ID: <20130306190421.GW9021@phenom.ffwll.local> References: <1362172471-7643-1-git-send-email-jbarnes@virtuousgeek.org> <1362172471-7643-28-git-send-email-jbarnes@virtuousgeek.org> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-wg0-f43.google.com (mail-wg0-f43.google.com [74.125.82.43]) by gabe.freedesktop.org (Postfix) with ESMTP id 41499E5C77 for ; Wed, 6 Mar 2013 11:01:49 -0800 (PST) Received: by mail-wg0-f43.google.com with SMTP id e12so8192725wge.22 for ; Wed, 06 Mar 2013 11:01:49 -0800 (PST) Content-Disposition: inline In-Reply-To: <1362172471-7643-28-git-send-email-jbarnes@virtuousgeek.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Jesse Barnes Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Fri, Mar 01, 2013 at 01:14:30PM -0800, Jesse Barnes wrote: > Fix up a couple of places where we messed with PCH bits on VLV. > > Signed-off-by: Jesse Barnes We might want ot untangle the cpu vs. pch dp port question from the dp vs. edp question eventually. Anyway, I've merged this patch here to dinq. -Daniel > --- > drivers/gpu/drm/i915/intel_dp.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c > index 03340fd..05e1000 100644 > --- a/drivers/gpu/drm/i915/intel_dp.c > +++ b/drivers/gpu/drm/i915/intel_dp.c > @@ -976,7 +976,7 @@ intel_dp_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode, > intel_dp->DP |= DP_LINK_TRAIN_OFF_CPT; > } > > - if (is_cpu_edp(intel_dp)) > + if (is_cpu_edp(intel_dp) && !IS_VALLEYVIEW(dev)) > ironlake_set_pll_edp(crtc, adjusted_mode->clock); > } > > @@ -1373,7 +1373,7 @@ static bool intel_dp_get_hw_state(struct intel_encoder *encoder, > if (!(tmp & DP_PORT_EN)) > return false; > > - if (is_cpu_edp(intel_dp) && IS_GEN7(dev)) { > + if (is_cpu_edp(intel_dp) && IS_GEN7(dev) && !IS_VALLEYVIEW(dev)) { > *pipe = PORT_TO_PIPE_CPT(tmp); > } else if (!HAS_PCH_CPT(dev) || is_cpu_edp(intel_dp)) { > *pipe = PORT_TO_PIPE(tmp); > -- > 1.7.9.5 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch