From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH 09/15] drm/i915: there's no PIPESTAT on Gen5+ Date: Thu, 7 Mar 2013 00:22:43 +0100 Message-ID: <20130306232243.GD9021@phenom.ffwll.local> References: <1362611003-4823-1-git-send-email-przanoni@gmail.com> <1362611003-4823-10-git-send-email-przanoni@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-ee0-f49.google.com (mail-ee0-f49.google.com [74.125.83.49]) by gabe.freedesktop.org (Postfix) with ESMTP id 7759EE6678 for ; Wed, 6 Mar 2013 15:20:10 -0800 (PST) Received: by mail-ee0-f49.google.com with SMTP id d41so6062291eek.36 for ; Wed, 06 Mar 2013 15:20:09 -0800 (PST) Content-Disposition: inline In-Reply-To: <1362611003-4823-10-git-send-email-przanoni@gmail.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Paulo Zanoni Cc: intel-gfx@lists.freedesktop.org, Paulo Zanoni List-Id: intel-gfx@lists.freedesktop.org On Wed, Mar 06, 2013 at 08:03:16PM -0300, Paulo Zanoni wrote: > From: Paulo Zanoni > > So don't read it when capturing the error state. This solves > "unclaimed register" messages on Haswell when we have a GPU hang. > > Signed-off-by: Paulo Zanoni Iirc pipestat exists on vlv, so I think this needs a !HAS_PCH_SPLIT test. Ville should know for sure. -Daniel > --- > drivers/gpu/drm/i915/i915_irq.c | 5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c > index 2139714..29b1bb1 100644 > --- a/drivers/gpu/drm/i915/i915_irq.c > +++ b/drivers/gpu/drm/i915/i915_irq.c > @@ -1366,8 +1366,9 @@ static void i915_capture_error_state(struct drm_device *dev) > else if (INTEL_INFO(dev)->gen == 6) > error->forcewake = I915_READ(FORCEWAKE); > > - for_each_pipe(pipe) > - error->pipestat[pipe] = I915_READ(PIPESTAT(pipe)); > + if (INTEL_INFO(dev)->gen <= 4) > + for_each_pipe(pipe) > + error->pipestat[pipe] = I915_READ(PIPESTAT(pipe)); > > if (INTEL_INFO(dev)->gen >= 6) { > error->error = I915_READ(ERROR_GEN6); > -- > 1.7.10.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch