From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jesse Barnes Subject: Re: [PATCH 09/26] drm/i915: add power context allocation and setup on VLV Date: Thu, 7 Mar 2013 14:56:16 -0800 Message-ID: <20130307145616.4f5fcd6f@jbarnes-desktop> References: <1362175722-9281-1-git-send-email-jbarnes@virtuousgeek.org> <1362175722-9281-9-git-send-email-jbarnes@virtuousgeek.org> <87boaxyj9f.fsf@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from oproxy14-pub.unifiedlayer.com (oproxy14-pub.unifiedlayer.com [67.222.51.224]) by gabe.freedesktop.org (Postfix) with SMTP id 51A68E5F88 for ; Thu, 7 Mar 2013 14:55:53 -0800 (PST) In-Reply-To: <87boaxyj9f.fsf@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Jani Nikula Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Tue, 05 Mar 2013 17:10:52 +0200 Jani Nikula wrote: > On Sat, 02 Mar 2013, Jesse Barnes wrote: > > The Gunit has a separate reg for this, so allocate some stolen space for > > the power context and initialize the reg. > > > > Signed-off-by: Jesse Barnes > > --- > > drivers/gpu/drm/i915/i915_drv.h | 2 ++ > > drivers/gpu/drm/i915/i915_gem_stolen.c | 41 ++++++++++++++++++++++++++++++++ > > drivers/gpu/drm/i915/i915_reg.h | 1 + > > 3 files changed, 44 insertions(+) > > > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > > index 48426e1..871d7c8 100644 > > --- a/drivers/gpu/drm/i915/i915_drv.h > > +++ b/drivers/gpu/drm/i915/i915_drv.h > > @@ -1024,6 +1024,8 @@ typedef struct drm_i915_private { > > > > struct i915_gpu_error gpu_error; > > > > + struct drm_mm_node *vlv_pctx; > > + > > /* list of fbdev register on this device */ > > struct intel_fbdev *fbdev; > > > > diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c b/drivers/gpu/drm/i915/i915_gem_stolen.c > > index 69d97cb..0d137de 100644 > > --- a/drivers/gpu/drm/i915/i915_gem_stolen.c > > +++ b/drivers/gpu/drm/i915/i915_gem_stolen.c > > @@ -171,11 +171,49 @@ void i915_gem_stolen_cleanup_compression(struct drm_device *dev) > > dev_priv->cfb_size = 0; > > } > > > > +static void i915_setup_pctx(struct drm_device *dev) > > +{ > > + struct drm_i915_private *dev_priv = dev->dev_private; > > + struct drm_mm_node *pctx; > > + unsigned long pctx_paddr; > > + int pctx_size = 24*1024; > > + > > + pctx = drm_mm_search_free(&dev_priv->mm.stolen, pctx_size, 4096, 0); > > + if (pctx) > > + pctx = drm_mm_get_block(pctx, pctx_size, 4096); > > + if (!pctx) > > + goto err; > > + > > + pctx_paddr = dev_priv->mm.stolen_base + pctx->start; > > + if (!pctx_paddr) > > + goto err_free_pctx; > > + > > + dev_priv->vlv_pctx = pctx; > > + I915_WRITE(VLV_PCBR, pctx_paddr); > > + > > + return; > > + > > +err_free_pctx: > > + drm_mm_put_block(pctx); > > +err: > > + DRM_DEBUG("not enough stolen space for PCTX, disabling\n"); > > +} > > + > > +static void i915_cleanup_pctx(struct drm_device *dev) > > +{ > > + struct drm_i915_private *dev_priv = dev->dev_private; > > + > > + I915_WRITE(VLV_PCBR, 0); > > + drm_mm_put_block(dev_priv->vlv_pctx); > > +} > > + > > void i915_gem_cleanup_stolen(struct drm_device *dev) > > { > > struct drm_i915_private *dev_priv = dev->dev_private; > > > > i915_gem_stolen_cleanup_compression(dev); > > + if (IS_VALLEYVIEW(dev) && i915_powersave) > > + i915_cleanup_pctx(dev); > > drm_mm_takedown(&dev_priv->mm.stolen); > > } > > > > @@ -193,6 +231,9 @@ int i915_gem_init_stolen(struct drm_device *dev) > > /* Basic memrange allocator for stolen space */ > > drm_mm_init(&dev_priv->mm.stolen, 0, dev_priv->gtt.stolen_size); > > > > + if (IS_VALLEYVIEW(dev) && i915_powersave) > > + i915_setup_pctx(dev); > > If the setup failed or someone toggled powersave on after module > loading, this oopses. Not likely I guess. Fixed it by checking the allocation before freeing. Thanks. -- Jesse Barnes, Intel Open Source Technology Center