From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH 13/15] drm/i915: don't save/restore PCH_LVDS on LPT Date: Sun, 17 Mar 2013 21:54:26 +0100 Message-ID: <20130317205426.GT9021@phenom.ffwll.local> References: <1362611003-4823-1-git-send-email-przanoni@gmail.com> <1362611003-4823-14-git-send-email-przanoni@gmail.com> <20130315210422.GM17773@bwidawsk.net> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-ea0-f180.google.com (mail-ea0-f180.google.com [209.85.215.180]) by gabe.freedesktop.org (Postfix) with ESMTP id ECB24E5E99 for ; Sun, 17 Mar 2013 13:51:41 -0700 (PDT) Received: by mail-ea0-f180.google.com with SMTP id j14so2214914eak.39 for ; Sun, 17 Mar 2013 13:51:41 -0700 (PDT) Content-Disposition: inline In-Reply-To: <20130315210422.GM17773@bwidawsk.net> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Ben Widawsky Cc: intel-gfx@lists.freedesktop.org, Paulo Zanoni List-Id: intel-gfx@lists.freedesktop.org On Fri, Mar 15, 2013 at 02:04:22PM -0700, Ben Widawsky wrote: > On Wed, Mar 06, 2013 at 08:03:20PM -0300, Paulo Zanoni wrote: > > From: Paulo Zanoni > > > > Because the register does not exist on LPT. The interesting fact is > > that reading/writing PCH_LVDS on LPT does *not* give us "unclaimed > > register" messages, but the register value is always 0. > > > > Signed-off-by: Paulo Zanoni > > --- > > drivers/gpu/drm/i915/i915_suspend.c | 7 ++++--- > > 1 file changed, 4 insertions(+), 3 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c > > index c1e02b0..41f0fde 100644 > > --- a/drivers/gpu/drm/i915/i915_suspend.c > > +++ b/drivers/gpu/drm/i915/i915_suspend.c > > @@ -209,7 +209,8 @@ static void i915_save_display(struct drm_device *dev) > > dev_priv->regfile.saveBLC_PWM_CTL2 = I915_READ(BLC_PWM_PCH_CTL2); > > dev_priv->regfile.saveBLC_CPU_PWM_CTL = I915_READ(BLC_PWM_CPU_CTL); > > dev_priv->regfile.saveBLC_CPU_PWM_CTL2 = I915_READ(BLC_PWM_CPU_CTL2); > > - dev_priv->regfile.saveLVDS = I915_READ(PCH_LVDS); > > + if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev)) > > + dev_priv->regfile.saveLVDS = I915_READ(PCH_LVDS); > > } else { > > dev_priv->regfile.savePP_CONTROL = I915_READ(PP_CONTROL); > > dev_priv->regfile.savePFIT_PGM_RATIOS = I915_READ(PFIT_PGM_RATIOS); > > @@ -271,9 +272,9 @@ static void i915_restore_display(struct drm_device *dev) > > if (drm_core_check_feature(dev, DRIVER_MODESET)) > > mask = ~LVDS_PORT_EN; > > > > - if (HAS_PCH_SPLIT(dev)) { > > + if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev)) > > I915_WRITE(PCH_LVDS, dev_priv->regfile.saveLVDS & mask); > > - } else if (IS_MOBILE(dev) && !IS_I830(dev)) > > + else if (INTEL_INFO(dev)->gen <= 4 && IS_MOBILE(dev) && !IS_I830(dev)) > > I915_WRITE(LVDS, dev_priv->regfile.saveLVDS & mask); > > > > if (!IS_I830(dev) && !IS_845G(dev) && !HAS_PCH_SPLIT(dev)) > > We don't support UMS on gen6+ so yuo can probably just check IS_GEN5 > instead of if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev)) Hah, trapped! We need to restore the LVDS reg even on kms safe for bit31 (which would enable the panel port) since we don't track all the bits of the panel state. And the bios doesn't really restore that ... Queued for -next, thanks for the patch. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch