From mboxrd@z Thu Jan  1 00:00:00 1970
From: Daniel Vetter <daniel@ffwll.ch>
Subject: Re: [PATCH 14/15] drm/i915: check the power well on
 i915_pipe_enabled
Date: Sun, 17 Mar 2013 21:55:09 +0100
Message-ID: <20130317205509.GU9021@phenom.ffwll.local>
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To: Paulo Zanoni <przanoni@gmail.com>
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On Wed, Mar 06, 2013 at 08:03:21PM -0300, Paulo Zanoni wrote:
> From: Paulo Zanoni <paulo.r.zanoni@intel.com>
> 
> This fixes "unclaimed register" messages when the power well is
> disabled and there's a GPU hang.
> 
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_irq.c |    3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 29b1bb1..aefc674 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -129,6 +129,9 @@ i915_pipe_enabled(struct drm_device *dev, int pipe)
>  	enum transcoder cpu_transcoder = intel_pipe_to_cpu_transcoder(dev_priv,
>  								      pipe);
>  
> +	if (intel_power_well_is_down(dev) && cpu_transcoder != TRANSCODER_EDP)
> +		return false;
> +
>  	return I915_READ(PIPECONF(cpu_transcoder)) & PIPECONF_ENABLE;

Again I vote for I915_READ_NOCHECK instead.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch