From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH 05/10] [v2] drm/i915: Don't initialize watermark stuff with PCH_NOP Date: Sun, 17 Mar 2013 22:02:44 +0100 Message-ID: <20130317210244.GW9021@phenom.ffwll.local> References: <1363198868-21787-6-git-send-email-ben@bwidawsk.net> <1363208772-24714-1-git-send-email-ben@bwidawsk.net> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-ea0-f169.google.com (mail-ea0-f169.google.com [209.85.215.169]) by gabe.freedesktop.org (Postfix) with ESMTP id 08D9FE5D01 for ; Sun, 17 Mar 2013 13:59:59 -0700 (PDT) Received: by mail-ea0-f169.google.com with SMTP id z7so2214725eaf.14 for ; Sun, 17 Mar 2013 13:59:59 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1363208772-24714-1-git-send-email-ben@bwidawsk.net> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Ben Widawsky Cc: intel-gfx@lists.freedesktop.org, "Mcallister, Jeffrey" List-Id: intel-gfx@lists.freedesktop.org On Wed, Mar 13, 2013 at 02:06:12PM -0700, Ben Widawsky wrote: > v2: Move check to the top (Chris) > Add BUG_ON for !ivybridge, since it's all we support for now (Ben) > > Signed-off-by: Ben Widawsky > --- > drivers/gpu/drm/i915/intel_pm.c | 9 +++++++-- > 1 file changed, 7 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index 52203fd..8e7908b 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -4153,7 +4153,12 @@ void intel_init_pm(struct drm_device *dev) > i915_ironlake_get_mem_freq(dev); > > /* For FIFO watermark updates */ > - if (HAS_PCH_SPLIT(dev)) { > + if (HAS_PCH_NOP(dev)) { > + BUG_ON(!IS_IVYBRIDGE(dev)); > + dev_priv->display.init_clock_gating = ivybridge_init_clock_gating; > + dev_priv->display.update_wm = NULL; > + dev_priv->display.update_sprite_wm = NULL; > + } else if (HAS_PCH_SPLIT(dev)) { > if (IS_GEN5(dev)) { > if (I915_READ(MLTR_ILK) & ILK_SRLT_MASK) > dev_priv->display.update_wm = ironlake_update_wm; > @@ -4175,7 +4180,7 @@ void intel_init_pm(struct drm_device *dev) > dev_priv->display.init_clock_gating = gen6_init_clock_gating; > } else if (IS_IVYBRIDGE(dev)) { > /* FIXME: detect B0+ stepping and use auto training */ > - if (SNB_READ_WM0_LATENCY()) { > + if (SNB_READ_WM0_LATENCY() && !HAS_PCH_NOP(dev)) { > dev_priv->display.update_wm = ivybridge_update_wm; > dev_priv->display.update_sprite_wm = sandybridge_update_sprite_wm; > } else { I'm confused why we need this patch here - update_wm functions should only be called when we have a pipe. If there's any caller left I think we should fix those up, not paper over it here. And imo it's ok to have non-NULL vfuncs here (or anywhere else, e.g. pageflips) as long as we don't call them. After all the num_pips/PCH_NOP checks are here to make this as unobtrusive as possible. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch